2012-05-16 13:54:07 +00:00
|
|
|
/dts-v1/;
|
|
|
|
|
2013-02-21 12:31:27 +00:00
|
|
|
#include "tegra20.dtsi"
|
2012-05-16 13:54:07 +00:00
|
|
|
|
|
|
|
/ {
|
|
|
|
model = "Compulab TrimSlice board";
|
|
|
|
compatible = "compulab,trimslice", "nvidia,tegra20";
|
|
|
|
|
2014-09-04 22:27:35 +00:00
|
|
|
chosen {
|
|
|
|
stdout-path = &uarta;
|
|
|
|
};
|
|
|
|
|
2012-05-16 13:54:07 +00:00
|
|
|
aliases {
|
ARM: tegra: fix USB controller aliases
Some boards have a different set of USB controllers enabled in DT than
the set referenced by /alias entries. This patch fixes that. For
example, this avoids the following message while booting on Ventana,
which is caused by the fact that the USB0 controller had no alias, and
defaulted to wanting a sequence number of 0, which was later explicitly
requested by the alias for USB controller 2.
USB2: Device 'usb@c5008000': seq 0 is in use by 'usb@c5000000'
This didn't affect USB operation in any way though.
Related, there's no need for the USB controller aliases to have an order
that's different from the HW order, so re-order any aliases to match the
HW ordering. This has the benefit that since USB controller 0 is the only
one that supports device-mode in HW, and U-Boot only supports enabling
device move on controller 0, there's now good synergy in the ordering! For
Tegra20, that's not relevant at present since USB device mode doesn't work
correctly on that SoC, but it will save some head-scratching later.
This patch doesn't fix the colibri_t20 board, even though it has the same
issue, since Marcel already sent a patch for that.
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Harmony and Ventana
2016-09-15 18:19:38 +00:00
|
|
|
usb0 = "/usb@c5000000";
|
2016-09-13 16:45:43 +00:00
|
|
|
mmc0 = "/sdhci@c8000600";
|
|
|
|
mmc1 = "/sdhci@c8000000";
|
2014-10-14 05:42:12 +00:00
|
|
|
spi0 = "/spi@7000c380";
|
2012-05-16 13:54:07 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
memory {
|
|
|
|
reg = <0x00000000 0x40000000>;
|
|
|
|
};
|
|
|
|
|
|
|
|
serial@70006000 {
|
|
|
|
clock-frequency = <216000000>;
|
|
|
|
};
|
|
|
|
|
2013-01-29 13:51:23 +00:00
|
|
|
spi@7000c380 {
|
|
|
|
status = "okay";
|
2023-03-30 18:24:22 +00:00
|
|
|
spi-max-frequency = <48000000>;
|
|
|
|
|
|
|
|
flash@0 {
|
|
|
|
compatible = "winbond,w25q80bl", "jedec,spi-nor";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <48000000>;
|
|
|
|
};
|
2013-01-29 13:51:23 +00:00
|
|
|
};
|
|
|
|
|
2019-04-15 09:32:37 +00:00
|
|
|
pcie@80003000 {
|
2014-12-10 05:25:14 +00:00
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
avdd-pex-supply = <&pci_vdd_reg>;
|
|
|
|
vdd-pex-supply = <&pci_vdd_reg>;
|
|
|
|
avdd-pex-pll-supply = <&pci_vdd_reg>;
|
|
|
|
avdd-plle-supply = <&pci_vdd_reg>;
|
|
|
|
vddio-pex-clk-supply = <&pci_clk_reg>;
|
|
|
|
|
|
|
|
pci@1,0 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2012-05-30 06:45:50 +00:00
|
|
|
usb@c5000000 {
|
2016-01-30 23:37:52 +00:00
|
|
|
status = "okay";
|
2015-01-06 03:05:41 +00:00
|
|
|
nvidia,vbus-gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
|
2012-05-16 13:54:07 +00:00
|
|
|
};
|
|
|
|
|
2013-02-21 12:31:29 +00:00
|
|
|
sdhci@c8000000 {
|
|
|
|
status = "okay";
|
|
|
|
bus-width = <4>;
|
|
|
|
};
|
|
|
|
|
|
|
|
sdhci@c8000600 {
|
|
|
|
status = "okay";
|
2015-01-06 03:05:41 +00:00
|
|
|
cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
|
|
|
|
wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
|
2013-02-21 12:31:29 +00:00
|
|
|
bus-width = <4>;
|
|
|
|
};
|
2014-12-10 05:25:14 +00:00
|
|
|
|
2016-01-30 23:37:52 +00:00
|
|
|
clocks {
|
|
|
|
compatible = "simple-bus";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
clk32k_in: clock@0 {
|
|
|
|
compatible = "fixed-clock";
|
|
|
|
reg=<0>;
|
|
|
|
#clock-cells = <0>;
|
|
|
|
clock-frequency = <32768>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2014-12-10 05:25:14 +00:00
|
|
|
regulators {
|
|
|
|
compatible = "simple-bus";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
hdmi_vdd_reg: regulator@0 {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
reg = <0>;
|
|
|
|
regulator-name = "avdd_hdmi";
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
hdmi_pll_reg: regulator@1 {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
reg = <1>;
|
|
|
|
regulator-name = "avdd_hdmi_pll";
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
vbus_reg: regulator@2 {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
reg = <2>;
|
|
|
|
regulator-name = "usb1_vbus";
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
enable-active-high;
|
2015-01-06 03:05:41 +00:00
|
|
|
gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
|
2014-12-10 05:25:14 +00:00
|
|
|
regulator-always-on;
|
|
|
|
regulator-boot-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
pci_clk_reg: regulator@3 {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
reg = <3>;
|
|
|
|
regulator-name = "pci_clk";
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
pci_vdd_reg: regulator@4 {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
reg = <4>;
|
|
|
|
regulator-name = "pci_vdd";
|
|
|
|
regulator-min-microvolt = <1050000>;
|
|
|
|
regulator-max-microvolt = <1050000>;
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2012-05-16 13:54:07 +00:00
|
|
|
};
|
2017-06-12 12:22:01 +00:00
|
|
|
|
|
|
|
&uarta {
|
|
|
|
status = "okay";
|
|
|
|
};
|