2021-06-02 07:58:25 +00:00
|
|
|
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
|
|
/*
|
|
|
|
* (C) Copyright 2021 Rockchip Electronics Co., Ltd
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef __CONFIG_RK3568_COMMON_H
|
|
|
|
#define __CONFIG_RK3568_COMMON_H
|
|
|
|
|
2023-02-22 22:44:41 +00:00
|
|
|
#define CFG_CPUID_OFFSET 0xa
|
|
|
|
|
2021-06-02 07:58:25 +00:00
|
|
|
#include "rockchip-common.h"
|
|
|
|
|
2022-12-04 15:04:13 +00:00
|
|
|
#define CFG_IRAM_BASE 0xfdcc0000
|
2021-06-02 07:58:25 +00:00
|
|
|
|
2022-11-16 18:10:37 +00:00
|
|
|
#define CFG_SYS_SDRAM_BASE 0
|
2021-06-02 07:58:25 +00:00
|
|
|
#define SDRAM_MAX_SIZE 0xf0000000
|
|
|
|
|
|
|
|
#define ENV_MEM_LAYOUT_SETTINGS \
|
|
|
|
"scriptaddr=0x00c00000\0" \
|
|
|
|
"pxefile_addr_r=0x00e00000\0" \
|
|
|
|
"fdt_addr_r=0x0a100000\0" \
|
|
|
|
"kernel_addr_r=0x02080000\0" \
|
|
|
|
"ramdisk_addr_r=0x0a200000\0"
|
|
|
|
|
|
|
|
#include <config_distro_bootcmd.h>
|
2022-12-04 15:03:50 +00:00
|
|
|
#define CFG_EXTRA_ENV_SETTINGS \
|
2021-06-02 07:58:25 +00:00
|
|
|
ENV_MEM_LAYOUT_SETTINGS \
|
|
|
|
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
|
|
|
|
"partitions=" PARTS_DEFAULT \
|
|
|
|
ROCKCHIP_DEVICE_SETTINGS \
|
|
|
|
BOOTENV
|
|
|
|
|
|
|
|
#endif
|