u-boot/arch/arm/mach-imx/mx8m/Makefile

#
# Copyright 2017 NXP
#
# SPDX-License-Identifier:	GPL-2.0+
#

obj-y += lowlevel_init.o
obj-y += clock.o clock_slice.o soc.o
imx: mx8m: add clock driver Add clock driver to support i.MX8M. There are two kind PLLs, FRAC pll and SSCG pll. ROM already configured SYS PLL1/2, we only need to configure the output. ocotp/i2c/pll decoding and configuration/usdhc/lcdif/dram pll/ enet clock are configured in the code. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> 2018-01-10 05:20:22 +00:00			`#`
			`# Copyright 2017 NXP`
			`#`
			`# SPDX-License-Identifier: GPL-2.0+`
			`#`

imx: mx8m: add soc related settings and files Add SoC level initialization code - arch_cpu_init - mmu table - detect cpu revision - reset cpu and wdog settings - timer init - wdog settings - lowlevel init to save/restore registers - a few dummy header file to avoid build failure - ft_system_setup Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> 2018-01-10 05:20:37 +00:00			`obj-y += lowlevel_init.o`
			`obj-y += clock.o clock_slice.o soc.o`