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101 lines
3.1 KiB
Text
101 lines
3.1 KiB
Text
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CONTENT:
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dma.h
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dma1.c
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dma2.s
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WHAT ARE THESE FILES:
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These files contain MPC8240 (Kahlua) DMA controller
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driver routines. The driver routines are not
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written for any specific operating system.
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They serves the purpose of code sample, and
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jump-start for using the MPC8240 DMA controller.
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For the reason of correctness of C language
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syntax, these files are compiled by Metaware
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C compiler and assembler.
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ENDIAN NOTATION:
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The algorithm is designed for big-endian mode,
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software is responsible for byte swapping.
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USAGE:
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1. The host system that is running on MPC8240
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or using MPC8240 as I/O device shall link
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the files listed here. The memory location
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of driver routines shall take into account of
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that driver routines need to run in supervisor
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mode and they process DMA controller interrupt.
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2. The host system is responsible for configuring
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the MPC8240 including Embedded Utilities Memory
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Block. Since the DMA controller on MPC8240 can
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be accessed by either local 603e core or the host
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that MPC8240 serves as I/O processor through host
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PCI configuration, it is important that the local
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processor uses EUMBBAR to access its local DMA
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controller while the PCI master uses I/O
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processor's PCSRBAR to access the DMA controller
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on I/O device.
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To qualify whether is EUMBBAR or PCSRBAR, one
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additional parameter is requied from the host
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system, LOCAL or REMOTE so that the base value
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can be correctly interpreted.
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3. If the host system is also using the EPIC unit
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on MPC8240, the system can register the
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DMA_ISR with the EPIC including other
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desired resources.
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If the host system does not using the EPIC unit
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on MPC8240, DMA_ISR function can be called for
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each desired time interval.
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In both cases, the host system is free to
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provide its own interrupt service routine.
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4. To start a direct mode DMA transaction,
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use DMA_Bld_Curr with the start parameter
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set to 1.
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To start a chaining mode DMA transaction,
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the application shall build descriptors
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in memory first, next, use DMA_Bld_Desp
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with the start parameter set to 1.
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5. DMA_Start function clears, then sets the CS
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bit of DMA mode register.
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DMA_Halt function clears the CS bit of DMA
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mode register.
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These functions can be used to start and
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halt the DMA transaction.
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If the chaining descriptors has been
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modified since the last time a DMA
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transaction started, use DMA_Chn_Cnt
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function to let DMA controller process
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the modified descriptor chain without
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stopping or disturbing the current DMA
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transaction.
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It is the host system's responsibility of
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setting up the correct DMA transfer mode
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and pass the correct memory address parameters.
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6. It is the host system's responsibility of
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queueing the DMA I/O request. The host
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system can call the DMA_ISR with its own
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desired interrupt service subroutines to
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handle each individual interrupt and queued
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DMA I/O requests.
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7. The DMA driver routines contains a set
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of utilities, Set and Get, for host system
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to query and modify the desired DMA registers.
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