2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2017-04-25 18:44:36 +00:00
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/*
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* Copyright (C) 2016-2017 Intel Corporation
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*/
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#ifndef _MISC_H_
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#define _MISC_H_
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void dwmac_deassert_reset(const unsigned int of_reset_id, const u32 phymode);
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struct bsel {
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const char *mode;
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const char *name;
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};
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extern struct bsel bsel_str[];
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#ifdef CONFIG_FPGA
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void socfpga_fpga_add(void);
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#else
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static inline void socfpga_fpga_add(void) {}
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#endif
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2017-04-25 18:44:43 +00:00
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#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
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unsigned int dedicated_uart_com_port(const void *blob);
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unsigned int shared_uart_com_port(const void *blob);
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unsigned int uart_com_port(const void *blob);
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#endif
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2017-04-25 18:44:36 +00:00
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#endif /* _MISC_H_ */
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