2005-03-27 23:41:39 +00:00
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/*
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* (C) Copyright 2002
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2011-08-04 16:45:45 +00:00
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* Stäubli Faverges - <www.staubli.com>
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2005-03-27 23:41:39 +00:00
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* Pierre AUBERT p.aubert@staubli.com
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*
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* (C) Copyright 2005
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* Martin Krause TQ-Systems GmbH martin.krause@tqs.de
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2005-03-27 23:41:39 +00:00
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*/
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/*
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* Basic video support for SMI SM501 "Voyager" graphic controller
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*/
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#include <common.h>
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2010-05-26 08:38:57 +00:00
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#include <asm/io.h>
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2005-03-27 23:41:39 +00:00
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#include <video_fb.h>
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#include <sm501.h>
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#define read8(ptrReg) \
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*(volatile unsigned char *)(sm501.isaBase + ptrReg)
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#define write8(ptrReg,value) \
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*(volatile unsigned char *)(sm501.isaBase + ptrReg) = value
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#define read16(ptrReg) \
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(*(volatile unsigned short *)(sm501.isaBase + ptrReg))
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#define write16(ptrReg,value) \
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(*(volatile unsigned short *)(sm501.isaBase + ptrReg) = value)
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#define read32(ptrReg) \
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(*(volatile unsigned int *)(sm501.isaBase + ptrReg))
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#define write32(ptrReg, value) \
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(*(volatile unsigned int *)(sm501.isaBase + ptrReg) = value)
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GraphicDevice sm501;
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2010-05-26 08:38:57 +00:00
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void write_be32(int off, unsigned int val)
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{
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out_be32((unsigned __iomem *)(sm501.isaBase + off), val);
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}
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void write_le32(int off, unsigned int val)
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{
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out_le32((unsigned __iomem *)(sm501.isaBase + off), val);
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}
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void (*write_reg32)(int off, unsigned int val) = write_be32;
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2005-03-27 23:41:39 +00:00
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/*-----------------------------------------------------------------------------
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* SmiSetRegs --
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*-----------------------------------------------------------------------------
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*/
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static void SmiSetRegs (void)
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{
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/*
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* The content of the chipset register depends on the board (clocks,
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* ...)
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*/
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const SMI_REGS *preg = board_get_regs ();
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while (preg->Index) {
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2010-05-26 08:38:57 +00:00
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write_reg32 (preg->Index, preg->Value);
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2005-03-27 23:41:39 +00:00
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/*
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* Insert a delay between
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*/
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udelay (1000);
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preg ++;
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}
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}
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2010-05-26 08:38:57 +00:00
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#ifdef CONFIG_VIDEO_SM501_PCI
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static struct pci_device_id sm501_pci_tbl[] = {
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{ PCI_VENDOR_ID_SMI, PCI_DEVICE_ID_SMI_501 },
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{}
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};
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#endif
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2010-05-26 08:38:58 +00:00
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/*
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* We do not enforce board code to provide empty/unused
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* functions for this driver and define weak default
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* functions here.
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*/
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unsigned int __board_video_init (void)
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{
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return 0;
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}
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unsigned int board_video_init (void)
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__attribute__((weak, alias("__board_video_init")));
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unsigned int __board_video_get_fb (void)
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{
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return 0;
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}
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unsigned int board_video_get_fb (void)
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__attribute__((weak, alias("__board_video_get_fb")));
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void __board_validate_screen (unsigned int base)
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{
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}
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void board_validate_screen (unsigned int base)
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__attribute__((weak, alias("__board_validate_screen")));
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2005-03-27 23:41:39 +00:00
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/*-----------------------------------------------------------------------------
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* video_hw_init --
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*-----------------------------------------------------------------------------
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*/
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void *video_hw_init (void)
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{
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2010-05-26 08:38:57 +00:00
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#ifdef CONFIG_VIDEO_SM501_PCI
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unsigned int pci_mem_base, pci_mmio_base;
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unsigned int id;
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unsigned short device_id;
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pci_dev_t devbusfn;
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int mem;
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#endif
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2005-03-27 23:41:39 +00:00
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unsigned int *vm, i;
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memset (&sm501, 0, sizeof (GraphicDevice));
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2010-05-26 08:38:57 +00:00
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#ifdef CONFIG_VIDEO_SM501_PCI
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printf("Video: ");
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/* Look for SM501/SM502 chips */
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devbusfn = pci_find_devices(sm501_pci_tbl, 0);
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if (devbusfn < 0) {
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printf ("PCI Controller not found.\n");
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goto not_pci;
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}
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/* Setup */
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pci_write_config_dword (devbusfn, PCI_COMMAND,
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(PCI_COMMAND_MEMORY | PCI_COMMAND_IO));
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pci_read_config_word (devbusfn, PCI_DEVICE_ID, &device_id);
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pci_read_config_dword (devbusfn, PCI_REVISION_ID, &id);
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pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, &pci_mem_base);
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pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_1, &pci_mmio_base);
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sm501.frameAdrs = pci_mem_to_phys (devbusfn, pci_mem_base);
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sm501.isaBase = pci_mem_to_phys (devbusfn, pci_mmio_base);
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if (sm501.isaBase)
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write_reg32 = write_le32;
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mem = in_le32 ((unsigned __iomem *)(sm501.isaBase + 0x10));
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mem = (mem & 0x0000e000) >> 13;
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switch (mem) {
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case 1:
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mem = 8;
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break;
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case 2:
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mem = 16;
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break;
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case 3:
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mem = 32;
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break;
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case 4:
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mem = 64;
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break;
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case 5:
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mem = 2;
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break;
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case 0:
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default:
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mem = 4;
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}
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printf ("PCI SM50%d %d MB\n", ((id & 0xff) == 0xC0) ? 2 : 1, mem);
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not_pci:
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#endif
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2005-03-27 23:41:39 +00:00
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/*
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* Initialization of the access to the graphic chipset Retreive base
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* address of the chipset (see board/RPXClassic/eccx.c)
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*/
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2010-05-26 08:38:57 +00:00
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if (!sm501.isaBase) {
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sm501.isaBase = board_video_init ();
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if (!sm501.isaBase)
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return NULL;
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2005-03-27 23:41:39 +00:00
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}
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2010-05-26 08:38:57 +00:00
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if (!sm501.frameAdrs) {
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sm501.frameAdrs = board_video_get_fb ();
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if (!sm501.frameAdrs)
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return NULL;
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2005-03-27 23:41:39 +00:00
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}
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sm501.winSizeX = board_get_width ();
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sm501.winSizeY = board_get_height ();
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#if defined(CONFIG_VIDEO_SM501_8BPP)
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sm501.gdfIndex = GDF__8BIT_INDEX;
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sm501.gdfBytesPP = 1;
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#elif defined(CONFIG_VIDEO_SM501_16BPP)
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sm501.gdfIndex = GDF_16BIT_565RGB;
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sm501.gdfBytesPP = 2;
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#elif defined(CONFIG_VIDEO_SM501_32BPP)
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sm501.gdfIndex = GDF_32BIT_X888RGB;
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sm501.gdfBytesPP = 4;
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#else
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#error Unsupported SM501 BPP
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#endif
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sm501.memSize = sm501.winSizeX * sm501.winSizeY * sm501.gdfBytesPP;
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/* Load Smi registers */
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SmiSetRegs ();
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/* (see board/RPXClassic/RPXClassic.c) */
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board_validate_screen (sm501.isaBase);
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/* Clear video memory */
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i = sm501.memSize/4;
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vm = (unsigned int *)sm501.frameAdrs;
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while(i--)
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*vm++ = 0;
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return (&sm501);
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}
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