2020-07-07 19:11:39 +00:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Generation of tables for particular device types
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*
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* Copyright 2019 Google LLC
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* Mostly taken from coreboot file of the same name
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*/
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#include <common.h>
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#include <dm.h>
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2020-07-07 19:11:43 +00:00
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#include <irq.h>
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2020-07-07 19:11:39 +00:00
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#include <log.h>
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2020-07-07 19:12:11 +00:00
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#include <usb.h>
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#include <acpi/acpigen.h>
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2020-07-07 19:11:39 +00:00
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#include <acpi/acpi_device.h>
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2020-07-07 19:11:43 +00:00
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#include <acpi/acpigen.h>
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2020-07-07 19:11:46 +00:00
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#include <asm-generic/gpio.h>
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2020-07-07 19:11:39 +00:00
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#include <dm/acpi.h>
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/**
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* acpi_device_path_fill() - Find the root device and build a path from there
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*
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* This recursively reaches back to the root device and progressively adds path
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* elements until the device is reached.
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*
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* @dev: Device to return path of
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* @buf: Buffer to hold the path
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* @buf_len: Length of buffer
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* @cur: Current position in the buffer
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* @return new position in buffer after adding @dev, or -ve on error
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*/
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static int acpi_device_path_fill(const struct udevice *dev, char *buf,
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size_t buf_len, int cur)
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{
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char name[ACPI_NAME_MAX];
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int next = 0;
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int ret;
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ret = acpi_get_name(dev, name);
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if (ret)
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return ret;
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/*
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* Make sure this name segment will fit, including the path segment
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* separator and possible NULL terminator, if this is the last segment.
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*/
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if (cur + strlen(name) + 2 > buf_len)
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return -ENOSPC;
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/* Walk up the tree to the root device */
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if (dev_get_parent(dev)) {
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next = acpi_device_path_fill(dev_get_parent(dev), buf, buf_len,
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cur);
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if (next < 0)
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return next;
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}
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/* Fill in the path from the root device */
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next += snprintf(buf + next, buf_len - next, "%s%s",
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dev_get_parent(dev) && *name ? "." : "", name);
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return next;
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}
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int acpi_device_path(const struct udevice *dev, char *buf, int maxlen)
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{
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int ret;
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ret = acpi_device_path_fill(dev, buf, maxlen, 0);
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if (ret < 0)
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return ret;
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return 0;
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}
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int acpi_device_scope(const struct udevice *dev, char *scope, int maxlen)
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{
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int ret;
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if (!dev_get_parent(dev))
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return log_msg_ret("noparent", -EINVAL);
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ret = acpi_device_path_fill(dev_get_parent(dev), scope, maxlen, 0);
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if (ret < 0)
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return log_msg_ret("fill", ret);
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return 0;
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}
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2020-07-07 19:11:40 +00:00
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enum acpi_dev_status acpi_device_status(const struct udevice *dev)
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{
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return ACPI_DSTATUS_ALL_ON;
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}
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2020-07-07 19:11:43 +00:00
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/**
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* largeres_write_len_f() - Write a placeholder word value
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*
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* Write a forward length for a large resource (2 bytes)
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*
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* @return pointer to the zero word (for fixing up later)
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*/
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static void *largeres_write_len_f(struct acpi_ctx *ctx)
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{
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u8 *p = acpigen_get_current(ctx);
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acpigen_emit_word(ctx, 0);
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return p;
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}
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/**
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* largeres_fill_from_len() - Fill in a length value
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*
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* This calculated the number of bytes since the provided @start and writes it
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* to @ptr, which was previous returned by largeres_write_len_f().
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*
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* @ptr: Word to update
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* @start: Start address to count from to calculated the length
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*/
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static void largeres_fill_from_len(struct acpi_ctx *ctx, char *ptr, u8 *start)
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{
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u16 len = acpigen_get_current(ctx) - start;
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ptr[0] = len & 0xff;
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ptr[1] = (len >> 8) & 0xff;
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}
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/**
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* largeres_fill_len() - Fill in a length value, excluding the length itself
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*
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* Fill in the length field with the value calculated from after the 16bit
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* field to acpigen current. This is useful since the length value does not
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* include the length field itself.
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*
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* This calls acpi_device_largeres_fill_len() passing @ptr + 2 as @start
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*
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* @ptr: Word to update.
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*/
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static void largeres_fill_len(struct acpi_ctx *ctx, void *ptr)
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{
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largeres_fill_from_len(ctx, ptr, ptr + sizeof(u16));
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}
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/* ACPI 6.3 section 6.4.3.6: Extended Interrupt Descriptor */
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static int acpi_device_write_interrupt(struct acpi_ctx *ctx,
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const struct acpi_irq *irq)
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{
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void *desc_length;
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u8 flags;
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if (!irq->pin)
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return -ENOENT;
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/* This is supported by GpioInt() but not Interrupt() */
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if (irq->polarity == ACPI_IRQ_ACTIVE_BOTH)
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return -EINVAL;
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/* Byte 0: Descriptor Type */
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acpigen_emit_byte(ctx, ACPI_DESCRIPTOR_INTERRUPT);
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/* Byte 1-2: Length (filled in later) */
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desc_length = largeres_write_len_f(ctx);
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/*
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* Byte 3: Flags
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* [7:5]: Reserved
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* [4]: Wake (0=NO_WAKE 1=WAKE)
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* [3]: Sharing (0=EXCLUSIVE 1=SHARED)
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* [2]: Polarity (0=HIGH 1=LOW)
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* [1]: Mode (0=LEVEL 1=EDGE)
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* [0]: Resource (0=PRODUCER 1=CONSUMER)
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*/
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flags = BIT(0); /* ResourceConsumer */
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if (irq->mode == ACPI_IRQ_EDGE_TRIGGERED)
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flags |= BIT(1);
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if (irq->polarity == ACPI_IRQ_ACTIVE_LOW)
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flags |= BIT(2);
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if (irq->shared == ACPI_IRQ_SHARED)
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flags |= BIT(3);
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if (irq->wake == ACPI_IRQ_WAKE)
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flags |= BIT(4);
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acpigen_emit_byte(ctx, flags);
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/* Byte 4: Interrupt Table Entry Count */
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acpigen_emit_byte(ctx, 1);
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/* Byte 5-8: Interrupt Number */
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acpigen_emit_dword(ctx, irq->pin);
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/* Fill in Descriptor Length (account for len word) */
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largeres_fill_len(ctx, desc_length);
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return 0;
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}
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int acpi_device_write_interrupt_irq(struct acpi_ctx *ctx,
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const struct irq *req_irq)
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{
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struct acpi_irq irq;
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int ret;
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ret = irq_get_acpi(req_irq, &irq);
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if (ret)
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return log_msg_ret("get", ret);
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ret = acpi_device_write_interrupt(ctx, &irq);
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if (ret)
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return log_msg_ret("write", ret);
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2020-07-07 19:11:46 +00:00
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return irq.pin;
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}
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/* ACPI 6.3 section 6.4.3.8.1 - GPIO Interrupt or I/O */
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int acpi_device_write_gpio(struct acpi_ctx *ctx, const struct acpi_gpio *gpio)
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{
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void *start, *desc_length;
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void *pin_table_offset, *vendor_data_offset, *resource_offset;
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u16 flags = 0;
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int pin;
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if (gpio->type > ACPI_GPIO_TYPE_IO)
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return -EINVAL;
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start = acpigen_get_current(ctx);
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/* Byte 0: Descriptor Type */
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acpigen_emit_byte(ctx, ACPI_DESCRIPTOR_GPIO);
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/* Byte 1-2: Length (fill in later) */
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desc_length = largeres_write_len_f(ctx);
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/* Byte 3: Revision ID */
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acpigen_emit_byte(ctx, ACPI_GPIO_REVISION_ID);
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/* Byte 4: GpioIo or GpioInt */
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acpigen_emit_byte(ctx, gpio->type);
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/*
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* Byte 5-6: General Flags
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* [15:1]: 0 => Reserved
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* [0]: 1 => ResourceConsumer
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*/
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acpigen_emit_word(ctx, 1 << 0);
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switch (gpio->type) {
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case ACPI_GPIO_TYPE_INTERRUPT:
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/*
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* Byte 7-8: GPIO Interrupt Flags
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* [15:5]: 0 => Reserved
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* [4]: Wake (0=NO_WAKE 1=WAKE)
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* [3]: Sharing (0=EXCLUSIVE 1=SHARED)
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* [2:1]: Polarity (0=HIGH 1=LOW 2=BOTH)
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* [0]: Mode (0=LEVEL 1=EDGE)
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*/
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if (gpio->irq.mode == ACPI_IRQ_EDGE_TRIGGERED)
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flags |= 1 << 0;
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if (gpio->irq.shared == ACPI_IRQ_SHARED)
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flags |= 1 << 3;
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if (gpio->irq.wake == ACPI_IRQ_WAKE)
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flags |= 1 << 4;
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switch (gpio->irq.polarity) {
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case ACPI_IRQ_ACTIVE_HIGH:
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flags |= 0 << 1;
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break;
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case ACPI_IRQ_ACTIVE_LOW:
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flags |= 1 << 1;
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break;
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case ACPI_IRQ_ACTIVE_BOTH:
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flags |= 2 << 1;
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break;
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}
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break;
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case ACPI_GPIO_TYPE_IO:
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/*
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* Byte 7-8: GPIO IO Flags
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* [15:4]: 0 => Reserved
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* [3]: Sharing (0=EXCLUSIVE 1=SHARED)
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* [2]: 0 => Reserved
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* [1:0]: IO Restriction
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* 0 => IoRestrictionNone
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* 1 => IoRestrictionInputOnly
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* 2 => IoRestrictionOutputOnly
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* 3 => IoRestrictionNoneAndPreserve
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*/
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flags |= gpio->io_restrict & 3;
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if (gpio->io_shared)
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flags |= 1 << 3;
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break;
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}
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acpigen_emit_word(ctx, flags);
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/*
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* Byte 9: Pin Configuration
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* 0x01 => Default (no configuration applied)
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* 0x02 => Pull-up
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* 0x03 => Pull-down
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* 0x04-0x7F => Reserved
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* 0x80-0xff => Vendor defined
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*/
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acpigen_emit_byte(ctx, gpio->pull);
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/* Byte 10-11: Output Drive Strength in 1/100 mA */
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acpigen_emit_word(ctx, gpio->output_drive_strength);
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/* Byte 12-13: Debounce Timeout in 1/100 ms */
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acpigen_emit_word(ctx, gpio->interrupt_debounce_timeout);
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/* Byte 14-15: Pin Table Offset, relative to start */
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pin_table_offset = largeres_write_len_f(ctx);
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/* Byte 16: Reserved */
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acpigen_emit_byte(ctx, 0);
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/* Byte 17-18: Resource Source Name Offset, relative to start */
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resource_offset = largeres_write_len_f(ctx);
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/* Byte 19-20: Vendor Data Offset, relative to start */
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vendor_data_offset = largeres_write_len_f(ctx);
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/* Byte 21-22: Vendor Data Length */
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acpigen_emit_word(ctx, 0);
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/* Fill in Pin Table Offset */
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largeres_fill_from_len(ctx, pin_table_offset, start);
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/* Pin Table, one word for each pin */
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for (pin = 0; pin < gpio->pin_count; pin++)
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acpigen_emit_word(ctx, gpio->pins[pin]);
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/* Fill in Resource Source Name Offset */
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largeres_fill_from_len(ctx, resource_offset, start);
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/* Resource Source Name String */
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acpigen_emit_string(ctx, gpio->resource);
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/* Fill in Vendor Data Offset */
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largeres_fill_from_len(ctx, vendor_data_offset, start);
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/* Fill in GPIO Descriptor Length (account for len word) */
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largeres_fill_len(ctx, desc_length);
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return gpio->pins[0];
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}
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int acpi_device_write_gpio_desc(struct acpi_ctx *ctx,
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const struct gpio_desc *desc)
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{
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struct acpi_gpio gpio;
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int ret;
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ret = gpio_get_acpi(desc, &gpio);
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if (ret)
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return log_msg_ret("desc", ret);
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ret = acpi_device_write_gpio(ctx, &gpio);
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if (ret < 0)
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return log_msg_ret("gpio", ret);
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2020-07-07 19:11:47 +00:00
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return ret;
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}
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int acpi_device_write_interrupt_or_gpio(struct acpi_ctx *ctx,
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struct udevice *dev, const char *prop)
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{
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struct irq req_irq;
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int pin;
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int ret;
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ret = irq_get_by_index(dev, 0, &req_irq);
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if (!ret) {
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ret = acpi_device_write_interrupt_irq(ctx, &req_irq);
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|
|
|
if (ret < 0)
|
|
|
|
return log_msg_ret("irq", ret);
|
|
|
|
pin = ret;
|
|
|
|
} else {
|
|
|
|
struct gpio_desc req_gpio;
|
|
|
|
|
|
|
|
ret = gpio_request_by_name(dev, prop, 0, &req_gpio,
|
|
|
|
GPIOD_IS_IN);
|
|
|
|
if (ret)
|
|
|
|
return log_msg_ret("no gpio", ret);
|
|
|
|
ret = acpi_device_write_gpio_desc(ctx, &req_gpio);
|
|
|
|
if (ret < 0)
|
|
|
|
return log_msg_ret("gpio", ret);
|
|
|
|
pin = ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return pin;
|
2020-07-07 19:11:43 +00:00
|
|
|
}
|
2020-07-07 19:11:48 +00:00
|
|
|
|
2020-07-07 19:12:02 +00:00
|
|
|
/* PowerResource() with Enable and/or Reset control */
|
|
|
|
int acpi_device_add_power_res(struct acpi_ctx *ctx, u32 tx_state_val,
|
|
|
|
const char *dw0_read, const char *dw0_write,
|
|
|
|
const struct gpio_desc *reset_gpio,
|
|
|
|
uint reset_delay_ms, uint reset_off_delay_ms,
|
|
|
|
const struct gpio_desc *enable_gpio,
|
|
|
|
uint enable_delay_ms, uint enable_off_delay_ms,
|
|
|
|
const struct gpio_desc *stop_gpio,
|
|
|
|
uint stop_delay_ms, uint stop_off_delay_ms)
|
|
|
|
{
|
|
|
|
static const char *const power_res_dev_states[] = { "_PR0", "_PR3" };
|
|
|
|
struct acpi_gpio reset, enable, stop;
|
|
|
|
bool has_reset, has_enable, has_stop;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
gpio_get_acpi(reset_gpio, &reset);
|
|
|
|
gpio_get_acpi(enable_gpio, &enable);
|
|
|
|
gpio_get_acpi(stop_gpio, &stop);
|
|
|
|
has_reset = reset.pins[0];
|
|
|
|
has_enable = enable.pins[0];
|
|
|
|
has_stop = stop.pins[0];
|
|
|
|
|
|
|
|
if (!has_reset && !has_enable && !has_stop)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/* PowerResource (PRIC, 0, 0) */
|
|
|
|
acpigen_write_power_res(ctx, "PRIC", 0, 0, power_res_dev_states,
|
|
|
|
ARRAY_SIZE(power_res_dev_states));
|
|
|
|
|
|
|
|
/* Method (_STA, 0, NotSerialized) { Return (0x1) } */
|
|
|
|
acpigen_write_sta(ctx, 0x1);
|
|
|
|
|
|
|
|
/* Method (_ON, 0, Serialized) */
|
|
|
|
acpigen_write_method_serialized(ctx, "_ON", 0);
|
2020-11-04 16:57:30 +00:00
|
|
|
if (has_reset) {
|
2020-07-07 19:12:02 +00:00
|
|
|
ret = acpigen_set_enable_tx_gpio(ctx, tx_state_val, dw0_read,
|
|
|
|
dw0_write, &reset, true);
|
|
|
|
if (ret)
|
|
|
|
return log_msg_ret("reset1", ret);
|
|
|
|
}
|
|
|
|
if (has_enable) {
|
|
|
|
ret = acpigen_set_enable_tx_gpio(ctx, tx_state_val, dw0_read,
|
|
|
|
dw0_write, &enable, true);
|
|
|
|
if (ret)
|
|
|
|
return log_msg_ret("enable1", ret);
|
|
|
|
if (enable_delay_ms)
|
|
|
|
acpigen_write_sleep(ctx, enable_delay_ms);
|
|
|
|
}
|
|
|
|
if (has_reset) {
|
|
|
|
ret = acpigen_set_enable_tx_gpio(ctx, tx_state_val, dw0_read,
|
|
|
|
dw0_write, &reset, false);
|
|
|
|
if (ret)
|
|
|
|
return log_msg_ret("reset2", ret);
|
|
|
|
if (reset_delay_ms)
|
|
|
|
acpigen_write_sleep(ctx, reset_delay_ms);
|
|
|
|
}
|
|
|
|
if (has_stop) {
|
|
|
|
ret = acpigen_set_enable_tx_gpio(ctx, tx_state_val, dw0_read,
|
|
|
|
dw0_write, &stop, false);
|
|
|
|
if (ret)
|
|
|
|
return log_msg_ret("stop1", ret);
|
|
|
|
if (stop_delay_ms)
|
|
|
|
acpigen_write_sleep(ctx, stop_delay_ms);
|
|
|
|
}
|
|
|
|
acpigen_pop_len(ctx); /* _ON method */
|
|
|
|
|
|
|
|
/* Method (_OFF, 0, Serialized) */
|
|
|
|
acpigen_write_method_serialized(ctx, "_OFF", 0);
|
|
|
|
if (has_stop) {
|
|
|
|
ret = acpigen_set_enable_tx_gpio(ctx, tx_state_val, dw0_read,
|
|
|
|
dw0_write, &stop, true);
|
|
|
|
if (ret)
|
|
|
|
return log_msg_ret("stop2", ret);
|
|
|
|
if (stop_off_delay_ms)
|
|
|
|
acpigen_write_sleep(ctx, stop_off_delay_ms);
|
|
|
|
}
|
|
|
|
if (has_reset) {
|
|
|
|
ret = acpigen_set_enable_tx_gpio(ctx, tx_state_val, dw0_read,
|
|
|
|
dw0_write, &reset, true);
|
|
|
|
if (ret)
|
|
|
|
return log_msg_ret("reset3", ret);
|
|
|
|
if (reset_off_delay_ms)
|
|
|
|
acpigen_write_sleep(ctx, reset_off_delay_ms);
|
|
|
|
}
|
|
|
|
if (has_enable) {
|
|
|
|
ret = acpigen_set_enable_tx_gpio(ctx, tx_state_val, dw0_read,
|
|
|
|
dw0_write, &enable, false);
|
|
|
|
if (ret)
|
|
|
|
return log_msg_ret("enable2", ret);
|
|
|
|
if (enable_off_delay_ms)
|
|
|
|
acpigen_write_sleep(ctx, enable_off_delay_ms);
|
|
|
|
}
|
|
|
|
acpigen_pop_len(ctx); /* _OFF method */
|
|
|
|
|
|
|
|
acpigen_pop_len(ctx); /* PowerResource PRIC */
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2020-09-22 18:44:58 +00:00
|
|
|
int acpi_device_write_dsm_i2c_hid(struct acpi_ctx *ctx,
|
|
|
|
int hid_desc_reg_offset)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
acpigen_write_dsm_start(ctx);
|
|
|
|
ret = acpigen_write_dsm_uuid_start(ctx, ACPI_DSM_I2C_HID_UUID);
|
|
|
|
if (ret)
|
|
|
|
return log_ret(ret);
|
|
|
|
|
|
|
|
acpigen_write_dsm_uuid_start_cond(ctx, 0);
|
|
|
|
/* ToInteger (Arg1, Local2) */
|
|
|
|
acpigen_write_to_integer(ctx, ARG1_OP, LOCAL2_OP);
|
|
|
|
/* If (LEqual (Local2, 0x0)) */
|
|
|
|
acpigen_write_if_lequal_op_int(ctx, LOCAL2_OP, 0x0);
|
|
|
|
/* Return (Buffer (One) { 0x1f }) */
|
|
|
|
acpigen_write_return_singleton_buffer(ctx, 0x1f);
|
|
|
|
acpigen_pop_len(ctx); /* Pop : If */
|
|
|
|
/* Else */
|
|
|
|
acpigen_write_else(ctx);
|
|
|
|
/* If (LEqual (Local2, 0x1)) */
|
|
|
|
acpigen_write_if_lequal_op_int(ctx, LOCAL2_OP, 0x1);
|
|
|
|
/* Return (Buffer (One) { 0x3f }) */
|
|
|
|
acpigen_write_return_singleton_buffer(ctx, 0x3f);
|
|
|
|
acpigen_pop_len(ctx); /* Pop : If */
|
|
|
|
/* Else */
|
|
|
|
acpigen_write_else(ctx);
|
|
|
|
/* Return (Buffer (One) { 0x0 }) */
|
|
|
|
acpigen_write_return_singleton_buffer(ctx, 0x0);
|
|
|
|
acpigen_pop_len(ctx); /* Pop : Else */
|
|
|
|
acpigen_pop_len(ctx); /* Pop : Else */
|
|
|
|
acpigen_write_dsm_uuid_end_cond(ctx);
|
|
|
|
|
|
|
|
acpigen_write_dsm_uuid_start_cond(ctx, 1);
|
|
|
|
acpigen_write_return_byte(ctx, hid_desc_reg_offset);
|
|
|
|
acpigen_write_dsm_uuid_end_cond(ctx);
|
|
|
|
|
|
|
|
acpigen_write_dsm_uuid_end(ctx);
|
|
|
|
acpigen_write_dsm_end(ctx);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2020-09-22 18:45:44 +00:00
|
|
|
/* ACPI 6.3 section 6.4.3.8.2.1 - I2cSerialBusV2() */
|
2020-07-07 19:11:48 +00:00
|
|
|
static void acpi_device_write_i2c(struct acpi_ctx *ctx,
|
|
|
|
const struct acpi_i2c *i2c)
|
|
|
|
{
|
|
|
|
void *desc_length, *type_length;
|
|
|
|
|
|
|
|
/* Byte 0: Descriptor Type */
|
|
|
|
acpigen_emit_byte(ctx, ACPI_DESCRIPTOR_SERIAL_BUS);
|
|
|
|
|
|
|
|
/* Byte 1+2: Length (filled in later) */
|
|
|
|
desc_length = largeres_write_len_f(ctx);
|
|
|
|
|
|
|
|
/* Byte 3: Revision ID */
|
|
|
|
acpigen_emit_byte(ctx, ACPI_I2C_SERIAL_BUS_REVISION_ID);
|
|
|
|
|
|
|
|
/* Byte 4: Resource Source Index is Reserved */
|
|
|
|
acpigen_emit_byte(ctx, 0);
|
|
|
|
|
|
|
|
/* Byte 5: Serial Bus Type is I2C */
|
|
|
|
acpigen_emit_byte(ctx, ACPI_SERIAL_BUS_TYPE_I2C);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Byte 6: Flags
|
|
|
|
* [7:2]: 0 => Reserved
|
|
|
|
* [1]: 1 => ResourceConsumer
|
|
|
|
* [0]: 0 => ControllerInitiated
|
|
|
|
*/
|
|
|
|
acpigen_emit_byte(ctx, 1 << 1);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Byte 7-8: Type Specific Flags
|
|
|
|
* [15:1]: 0 => Reserved
|
|
|
|
* [0]: 0 => 7bit, 1 => 10bit
|
|
|
|
*/
|
|
|
|
acpigen_emit_word(ctx, i2c->mode_10bit);
|
|
|
|
|
|
|
|
/* Byte 9: Type Specific Revision ID */
|
|
|
|
acpigen_emit_byte(ctx, ACPI_I2C_TYPE_SPECIFIC_REVISION_ID);
|
|
|
|
|
|
|
|
/* Byte 10-11: I2C Type Data Length */
|
|
|
|
type_length = largeres_write_len_f(ctx);
|
|
|
|
|
|
|
|
/* Byte 12-15: I2C Bus Speed */
|
|
|
|
acpigen_emit_dword(ctx, i2c->speed);
|
|
|
|
|
|
|
|
/* Byte 16-17: I2C Slave Address */
|
|
|
|
acpigen_emit_word(ctx, i2c->address);
|
|
|
|
|
|
|
|
/* Fill in Type Data Length */
|
|
|
|
largeres_fill_len(ctx, type_length);
|
|
|
|
|
|
|
|
/* Byte 18+: ResourceSource */
|
|
|
|
acpigen_emit_string(ctx, i2c->resource);
|
|
|
|
|
|
|
|
/* Fill in I2C Descriptor Length */
|
|
|
|
largeres_fill_len(ctx, desc_length);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* acpi_device_set_i2c() - Set up an ACPI I2C struct from a device
|
|
|
|
*
|
|
|
|
* The value of @scope is not copied, but only referenced. This implies the
|
|
|
|
* caller has to ensure it stays valid for the lifetime of @i2c.
|
|
|
|
*
|
|
|
|
* @dev: I2C device to convert
|
|
|
|
* @i2c: Place to put the new structure
|
|
|
|
* @scope: Scope of the I2C device (this is the controller path)
|
|
|
|
* @return chip address of device
|
|
|
|
*/
|
|
|
|
static int acpi_device_set_i2c(const struct udevice *dev, struct acpi_i2c *i2c,
|
|
|
|
const char *scope)
|
|
|
|
{
|
2020-12-03 23:55:18 +00:00
|
|
|
struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
|
2020-07-07 19:11:48 +00:00
|
|
|
struct udevice *bus = dev_get_parent(dev);
|
|
|
|
|
|
|
|
memset(i2c, '\0', sizeof(*i2c));
|
|
|
|
i2c->address = chip->chip_addr;
|
|
|
|
i2c->mode_10bit = 0;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* i2c_bus->speed_hz is set if this device is probed, but if not we
|
|
|
|
* must use the device tree
|
|
|
|
*/
|
|
|
|
i2c->speed = dev_read_u32_default(bus, "clock-frequency",
|
|
|
|
I2C_SPEED_STANDARD_RATE);
|
|
|
|
i2c->resource = scope;
|
|
|
|
|
|
|
|
return i2c->address;
|
|
|
|
}
|
|
|
|
|
|
|
|
int acpi_device_write_i2c_dev(struct acpi_ctx *ctx, const struct udevice *dev)
|
|
|
|
{
|
|
|
|
char scope[ACPI_PATH_MAX];
|
|
|
|
struct acpi_i2c i2c;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = acpi_device_scope(dev, scope, sizeof(scope));
|
|
|
|
if (ret)
|
|
|
|
return log_msg_ret("scope", ret);
|
|
|
|
ret = acpi_device_set_i2c(dev, &i2c, scope);
|
|
|
|
if (ret < 0)
|
|
|
|
return log_msg_ret("set", ret);
|
|
|
|
acpi_device_write_i2c(ctx, &i2c);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
2020-07-07 19:11:49 +00:00
|
|
|
|
|
|
|
#ifdef CONFIG_SPI
|
|
|
|
/* ACPI 6.1 section 6.4.3.8.2.2 - SpiSerialBus() */
|
|
|
|
static void acpi_device_write_spi(struct acpi_ctx *ctx, const struct acpi_spi *spi)
|
|
|
|
{
|
|
|
|
void *desc_length, *type_length;
|
|
|
|
u16 flags = 0;
|
|
|
|
|
|
|
|
/* Byte 0: Descriptor Type */
|
|
|
|
acpigen_emit_byte(ctx, ACPI_DESCRIPTOR_SERIAL_BUS);
|
|
|
|
|
|
|
|
/* Byte 1+2: Length (filled in later) */
|
|
|
|
desc_length = largeres_write_len_f(ctx);
|
|
|
|
|
|
|
|
/* Byte 3: Revision ID */
|
|
|
|
acpigen_emit_byte(ctx, ACPI_SPI_SERIAL_BUS_REVISION_ID);
|
|
|
|
|
|
|
|
/* Byte 4: Resource Source Index is Reserved */
|
|
|
|
acpigen_emit_byte(ctx, 0);
|
|
|
|
|
|
|
|
/* Byte 5: Serial Bus Type is SPI */
|
|
|
|
acpigen_emit_byte(ctx, ACPI_SERIAL_BUS_TYPE_SPI);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Byte 6: Flags
|
|
|
|
* [7:2]: 0 => Reserved
|
|
|
|
* [1]: 1 => ResourceConsumer
|
|
|
|
* [0]: 0 => ControllerInitiated
|
|
|
|
*/
|
|
|
|
acpigen_emit_byte(ctx, BIT(1));
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Byte 7-8: Type Specific Flags
|
|
|
|
* [15:2]: 0 => Reserveda
|
|
|
|
* [1]: 0 => ActiveLow, 1 => ActiveHigh
|
|
|
|
* [0]: 0 => FourWire, 1 => ThreeWire
|
|
|
|
*/
|
|
|
|
if (spi->wire_mode == SPI_3_WIRE_MODE)
|
|
|
|
flags |= BIT(0);
|
|
|
|
if (spi->device_select_polarity == SPI_POLARITY_HIGH)
|
|
|
|
flags |= BIT(1);
|
|
|
|
acpigen_emit_word(ctx, flags);
|
|
|
|
|
|
|
|
/* Byte 9: Type Specific Revision ID */
|
|
|
|
acpigen_emit_byte(ctx, ACPI_SPI_TYPE_SPECIFIC_REVISION_ID);
|
|
|
|
|
|
|
|
/* Byte 10-11: SPI Type Data Length */
|
|
|
|
type_length = largeres_write_len_f(ctx);
|
|
|
|
|
|
|
|
/* Byte 12-15: Connection Speed */
|
|
|
|
acpigen_emit_dword(ctx, spi->speed);
|
|
|
|
|
|
|
|
/* Byte 16: Data Bit Length */
|
|
|
|
acpigen_emit_byte(ctx, spi->data_bit_length);
|
|
|
|
|
|
|
|
/* Byte 17: Clock Phase */
|
|
|
|
acpigen_emit_byte(ctx, spi->clock_phase);
|
|
|
|
|
|
|
|
/* Byte 18: Clock Polarity */
|
|
|
|
acpigen_emit_byte(ctx, spi->clock_polarity);
|
|
|
|
|
|
|
|
/* Byte 19-20: Device Selection */
|
|
|
|
acpigen_emit_word(ctx, spi->device_select);
|
|
|
|
|
|
|
|
/* Fill in Type Data Length */
|
|
|
|
largeres_fill_len(ctx, type_length);
|
|
|
|
|
|
|
|
/* Byte 21+: ResourceSource String */
|
|
|
|
acpigen_emit_string(ctx, spi->resource);
|
|
|
|
|
|
|
|
/* Fill in SPI Descriptor Length */
|
|
|
|
largeres_fill_len(ctx, desc_length);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* acpi_device_set_spi() - Set up an ACPI SPI struct from a device
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*
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* The value of @scope is not copied, but only referenced. This implies the
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* caller has to ensure it stays valid for the lifetime of @spi.
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*
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* @dev: SPI device to convert
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* @spi: Place to put the new structure
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* @scope: Scope of the SPI device (this is the controller path)
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* @return 0 (always)
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*/
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static int acpi_device_set_spi(const struct udevice *dev, struct acpi_spi *spi,
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const char *scope)
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{
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2020-12-03 23:55:23 +00:00
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struct dm_spi_slave_plat *plat;
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2020-07-07 19:11:49 +00:00
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struct spi_slave *slave = dev_get_parent_priv(dev);
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2020-12-03 23:55:18 +00:00
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plat = dev_get_parent_plat(slave->dev);
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2020-07-07 19:11:49 +00:00
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memset(spi, '\0', sizeof(*spi));
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spi->device_select = plat->cs;
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spi->device_select_polarity = SPI_POLARITY_LOW;
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spi->wire_mode = SPI_4_WIRE_MODE;
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spi->speed = plat->max_hz;
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spi->data_bit_length = slave->wordlen;
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spi->clock_phase = plat->mode & SPI_CPHA ?
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SPI_CLOCK_PHASE_SECOND : SPI_CLOCK_PHASE_FIRST;
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spi->clock_polarity = plat->mode & SPI_CPOL ?
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SPI_POLARITY_HIGH : SPI_POLARITY_LOW;
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spi->resource = scope;
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return 0;
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}
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int acpi_device_write_spi_dev(struct acpi_ctx *ctx, const struct udevice *dev)
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|
{
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|
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char scope[ACPI_PATH_MAX];
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struct acpi_spi spi;
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int ret;
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ret = acpi_device_scope(dev, scope, sizeof(scope));
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if (ret)
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return log_msg_ret("scope", ret);
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ret = acpi_device_set_spi(dev, &spi, scope);
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if (ret)
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return log_msg_ret("set", ret);
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acpi_device_write_spi(ctx, &spi);
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return 0;
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}
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#endif /* CONFIG_SPI */
|
2020-07-07 19:12:11 +00:00
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|
|
static const char *acpi_name_from_id(enum uclass_id id)
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|
|
{
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|
|
switch (id) {
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|
|
case UCLASS_USB_HUB:
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|
|
/* Root Hub */
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|
|
return "RHUB";
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|
|
/* DSDT: acpi/northbridge.asl */
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|
|
case UCLASS_NORTHBRIDGE:
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|
|
return "MCHC";
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|
|
/* DSDT: acpi/lpc.asl */
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|
|
case UCLASS_LPC:
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|
|
return "LPCB";
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|
|
/* DSDT: acpi/xhci.asl */
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|
|
case UCLASS_USB:
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|
|
|
/* This only supports USB3.0 controllers at present */
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|
|
|
return "XHCI";
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|
|
|
case UCLASS_PWM:
|
|
|
|
return "PWM";
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|
|
default:
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int acpi_check_seq(const struct udevice *dev)
|
|
|
|
{
|
|
|
|
if (dev->req_seq == -1) {
|
|
|
|
log_warning("Device '%s' has no seq\n", dev->name);
|
|
|
|
return log_msg_ret("no seq", -ENXIO);
|
|
|
|
}
|
|
|
|
|
|
|
|
return dev->req_seq;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If you change this function, add test cases to dm_test_acpi_get_name() */
|
|
|
|
int acpi_device_infer_name(const struct udevice *dev, char *out_name)
|
|
|
|
{
|
|
|
|
enum uclass_id parent_id = UCLASS_INVALID;
|
|
|
|
enum uclass_id id;
|
|
|
|
const char *name = NULL;
|
|
|
|
|
|
|
|
id = device_get_uclass_id(dev);
|
|
|
|
if (dev_get_parent(dev))
|
|
|
|
parent_id = device_get_uclass_id(dev_get_parent(dev));
|
|
|
|
|
|
|
|
if (id == UCLASS_SOUND)
|
|
|
|
name = "HDAS";
|
|
|
|
else if (id == UCLASS_PCI)
|
|
|
|
name = "PCI0";
|
|
|
|
else if (device_is_on_pci_bus(dev))
|
|
|
|
name = acpi_name_from_id(id);
|
|
|
|
if (!name) {
|
|
|
|
switch (parent_id) {
|
|
|
|
case UCLASS_USB: {
|
|
|
|
struct usb_device *udev = dev_get_parent_priv(dev);
|
|
|
|
|
|
|
|
sprintf(out_name, udev->speed >= USB_SPEED_SUPER ?
|
|
|
|
"HS%02d" : "FS%02d", udev->portnr);
|
|
|
|
name = out_name;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (!name) {
|
|
|
|
int num;
|
|
|
|
|
|
|
|
switch (id) {
|
|
|
|
/* DSDT: acpi/lpss.asl */
|
|
|
|
case UCLASS_SERIAL:
|
|
|
|
num = acpi_check_seq(dev);
|
|
|
|
if (num < 0)
|
|
|
|
return num;
|
|
|
|
sprintf(out_name, "URT%d", num);
|
|
|
|
name = out_name;
|
|
|
|
break;
|
|
|
|
case UCLASS_I2C:
|
|
|
|
num = acpi_check_seq(dev);
|
|
|
|
if (num < 0)
|
|
|
|
return num;
|
|
|
|
sprintf(out_name, "I2C%d", num);
|
|
|
|
name = out_name;
|
|
|
|
break;
|
|
|
|
case UCLASS_SPI:
|
|
|
|
num = acpi_check_seq(dev);
|
|
|
|
if (num < 0)
|
|
|
|
return num;
|
|
|
|
sprintf(out_name, "SPI%d", num);
|
|
|
|
name = out_name;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (!name) {
|
|
|
|
log_warning("No name for device '%s'\n", dev->name);
|
|
|
|
return -ENOENT;
|
|
|
|
}
|
|
|
|
if (name != out_name)
|
|
|
|
acpi_copy_name(out_name, name);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|