2020-12-29 23:06:32 +00:00
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# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
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#
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2020-12-29 23:06:34 +00:00
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config CLK_TI_AM3_DPLL
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bool "TI AM33XX Digital Phase-Locked Loop (DPLL) clock drivers"
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depends on CLK && OF_CONTROL
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help
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This enables the DPLL clock drivers support on AM33XX SoCs. The DPLL
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provides all interface clocks and functional clocks to the processor.
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2020-12-29 23:06:39 +00:00
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config CLK_TI_CTRL
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bool "TI OMAP4 clock controller"
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depends on CLK && OF_CONTROL
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help
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This enables the clock controller driver support on TI's SoCs.
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2020-12-29 23:06:35 +00:00
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config CLK_TI_DIVIDER
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bool "TI divider clock driver"
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depends on CLK && OF_CONTROL && CLK_CCF
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help
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This enables the divider clock driver support on TI's SoCs.
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2020-12-29 23:06:36 +00:00
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config CLK_TI_GATE
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bool "TI gate clock driver"
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depends on CLK && OF_CONTROL
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help
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This enables the gate clock driver support on TI's SoCs.
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2020-12-29 23:06:32 +00:00
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config CLK_TI_MUX
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bool "TI mux clock driver"
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depends on CLK && OF_CONTROL && CLK_CCF
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help
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This enables the mux clock driver support on TI's SoCs.
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2020-12-29 23:16:20 +00:00
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config CLK_TI_SCI
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bool "TI System Control Interface (TI SCI) clock driver"
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depends on CLK && TI_SCI_PROTOCOL && OF_CONTROL
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help
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This enables the clock driver support over TI System Control Interface
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available on some new TI's SoCs. If you wish to use clock resources
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managed by the TI System Controller, say Y here. Otherwise, say N.
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2021-06-11 08:45:13 +00:00
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config CLK_K3_PLL
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bool "PLL clock support for K3 SoC family of devices"
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depends on CLK && LIB_RATIONAL
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help
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Enables PLL clock support for K3 SoC family of devices.
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config SPL_CLK_K3_PLL
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bool "PLL clock support for K3 SoC family of devices"
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depends on CLK && LIB_RATIONAL && SPL
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help
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Enables PLL clock support for K3 SoC family of devices.
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2021-06-11 08:45:14 +00:00
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config CLK_K3
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bool "Clock support for K3 SoC family of devices"
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depends on CLK
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help
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Enables the clock translation layer from DT to device clocks.
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config SPL_CLK_K3
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bool "Clock support for K3 SoC family of devices"
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depends on CLK && SPL
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help
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Enables the clock translation layer from DT to device clocks.
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