2018-10-03 12:25:14 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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#ifndef _GPIO_DA8XX_DEFS_H_
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#define _GPIO_DA8XX_DEFS_H_
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struct davinci_gpio {
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unsigned int dir;
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unsigned int out_data;
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unsigned int set_data;
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unsigned int clr_data;
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unsigned int in_data;
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unsigned int set_rising;
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unsigned int clr_rising;
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unsigned int set_falling;
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unsigned int clr_falling;
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unsigned int intstat;
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};
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struct davinci_gpio_bank {
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int num_gpio;
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unsigned int irq_num;
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unsigned int irq_mask;
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unsigned long *in_use;
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struct davinci_gpio *base;
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};
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#define GPIO_NAME_SIZE 20
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#define MAX_NUM_GPIOS 144
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#define GPIO_BIT(gp) ((gp) & 0x1F)
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2019-12-07 04:41:35 +00:00
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#if CONFIG_IS_ENABLED(DM_GPIO)
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2018-10-03 12:25:14 +00:00
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/* Information about a GPIO bank */
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struct davinci_gpio_platdata {
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int bank_index;
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ulong base; /* address of registers in physical memory */
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const char *port_name;
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};
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#endif
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#endif
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