2018-12-20 08:12:51 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2018 MediaTek Inc.
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*/
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#ifndef _DT_BINDINGS_MTK_RESET_H_
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#define _DT_BINDINGS_MTK_RESET_H_
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2019-08-22 10:26:52 +00:00
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/* ETHSYS resets */
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2018-12-20 08:12:51 +00:00
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#define ETHSYS_PPE_RST 31
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#define ETHSYS_GMAC_RST 23
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#define ETHSYS_FE_RST 6
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#define ETHSYS_MCM_RST 2
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#define ETHSYS_SYS_RST 0
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2019-07-29 14:17:47 +00:00
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/* HIFSYS resets */
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#define HIFSYS_PCIE2_RST 26
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#define HIFSYS_PCIE1_RST 25
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#define HIFSYS_PCIE0_RST 24
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#define HIFSYS_UPHY1_RST 22
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#define HIFSYS_UPHY0_RST 21
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#define HIFSYS_UHOST1_RST 4
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#define HIFSYS_UHOST0_RST 3
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2018-12-20 08:12:51 +00:00
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#endif /* _DT_BINDINGS_MTK_RESET_H_ */
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