2004-02-27 08:20:54 +00:00
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/*
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* (C) Copyright 2004
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* Pierre AUBERT, Staubli Faverges, <p.aubert@staubli.com>
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2004-02-27 08:20:54 +00:00
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*
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* Init is derived from Linux code.
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*/
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#include <common.h>
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2007-07-10 15:27:39 +00:00
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#if defined(CONFIG_CMD_IDE)
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2004-02-27 08:20:54 +00:00
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#include <mpc5xxx.h>
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2006-03-31 16:32:53 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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2004-02-27 08:20:54 +00:00
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#define CALC_TIMING(t) (t + period - 1) / period
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2004-03-14 00:59:59 +00:00
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#ifdef CONFIG_IDE_RESET
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extern void init_ide_reset (void);
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#endif
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2004-02-27 08:20:54 +00:00
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int ide_preinit (void)
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{
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long period, t0, t1, t2_8, t2_16, t4, ta;
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vu_long reg;
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struct mpc5xxx_sdma *psdma = (struct mpc5xxx_sdma *) MPC5XXX_SDMA;
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reg = *(vu_long *) MPC5XXX_GPS_PORT_CONFIG;
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2009-03-17 09:06:39 +00:00
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#if defined(CONFIG_SYS_ATA_CS_ON_I2C2)
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2004-07-11 19:17:20 +00:00
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/* ATA cs0/1 on i2c2 clk/io */
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reg = (reg & ~0x03000000ul) | 0x02000000ul;
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2009-06-14 22:21:28 +00:00
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#elif defined(CONFIG_SYS_ATA_CS_ON_TIMER01)
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/* ATA cs0/1 on Timer 0/1 */
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reg = (reg & ~0x03000000ul) | 0x03000000ul;
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2004-07-11 19:17:20 +00:00
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#else
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/* ATA cs0/1 on Local Plus cs4/5 */
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2004-02-27 08:20:54 +00:00
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reg = (reg & ~0x03000000ul) | 0x01000000ul;
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2004-07-11 19:17:20 +00:00
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#endif /* CONFIG_TOTAL5200 */
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2004-02-27 08:20:54 +00:00
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*(vu_long *) MPC5XXX_GPS_PORT_CONFIG = reg;
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/* All sample codes do that... */
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*(vu_long *) MPC5XXX_ATA_SHARE_COUNT = 0;
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/* Configure and reset host */
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*(vu_long *) MPC5XXX_ATA_HOST_CONFIG = MPC5xxx_ATA_HOSTCONF_IORDY |
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MPC5xxx_ATA_HOSTCONF_SMR | MPC5xxx_ATA_HOSTCONF_FR;
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udelay (10);
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*(vu_long *) MPC5XXX_ATA_HOST_CONFIG = MPC5xxx_ATA_HOSTCONF_IORDY;
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/* Disable prefetch on Commbus */
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psdma->PtdCntrl |= 1;
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/* Init timings : we use PIO mode 0 timings */
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2012-12-13 20:48:53 +00:00
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period = 1000000000 / gd->arch.ipb_clk; /* period in ns */
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2004-02-27 08:20:54 +00:00
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t0 = CALC_TIMING (600);
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t2_8 = CALC_TIMING (290);
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t2_16 = CALC_TIMING (165);
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reg = (t0 << 24) | (t2_8 << 16) | (t2_16 << 8);
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*(vu_long *) MPC5XXX_ATA_PIO1 = reg;
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t4 = CALC_TIMING (30);
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t1 = CALC_TIMING (70);
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ta = CALC_TIMING (35);
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reg = (t4 << 24) | (t1 << 16) | (ta << 8);
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*(vu_long *) MPC5XXX_ATA_PIO2 = reg;
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2004-03-14 00:59:59 +00:00
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#ifdef CONFIG_IDE_RESET
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2004-03-14 22:25:36 +00:00
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init_ide_reset ();
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2004-03-14 00:59:59 +00:00
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#endif /* CONFIG_IDE_RESET */
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2004-02-27 08:20:54 +00:00
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return (0);
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}
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2007-07-10 15:27:39 +00:00
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#endif
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