2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2008-04-30 09:42:50 +00:00
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/*
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* (C) Copyright 2008
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* Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
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*
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* Copyright 2004 Freescale Semiconductor.
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* (C) Copyright 2002,2003, Motorola Inc.
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* Xianghua Xiao, (X.Xiao@motorola.com)
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*
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* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
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*/
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#include <common.h>
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2019-08-01 15:46:42 +00:00
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#include <env.h>
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2008-04-30 09:42:50 +00:00
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#include <pci.h>
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#include <asm/processor.h>
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#include <asm/immap_85xx.h>
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#include <ioports.h>
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#include <flash.h>
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2018-03-04 16:20:11 +00:00
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#include <linux/libfdt.h>
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2008-05-07 13:10:49 +00:00
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#include <fdt_support.h>
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2008-06-10 23:49:34 +00:00
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#include <asm/io.h>
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2008-09-11 13:40:01 +00:00
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#include <i2c.h>
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#include <mb862xx.h>
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#include <video_fb.h>
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2008-06-06 13:42:41 +00:00
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#include "upm_table.h"
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2008-08-15 13:42:12 +00:00
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2008-04-30 09:42:50 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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extern flash_info_t flash_info[]; /* FLASH chips info */
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2008-09-11 13:40:01 +00:00
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extern GraphicDevice mb862xx;
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2008-04-30 09:42:50 +00:00
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void local_bus_init (void);
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ulong flash_get_size (ulong base, int banknum);
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int checkboard (void)
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{
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2008-10-16 13:01:15 +00:00
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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2011-05-04 10:32:28 +00:00
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char buf[64];
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2008-05-27 11:47:00 +00:00
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int f;
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2017-08-03 18:22:12 +00:00
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int i = env_get_f("serial#", buf, sizeof(buf));
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2011-05-04 10:32:28 +00:00
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#ifdef CONFIG_PCI
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char *src;
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#endif
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2008-04-30 09:42:50 +00:00
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puts("Board: Socrates");
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2011-05-04 10:32:28 +00:00
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if (i > 0) {
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2008-04-30 09:42:50 +00:00
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puts(", serial# ");
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2011-05-04 10:32:28 +00:00
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puts(buf);
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2008-04-30 09:42:50 +00:00
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}
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putc('\n');
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2019-10-16 03:55:54 +00:00
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#if defined(CONFIG_PCI) || defined(CONFIG_DM_PCI)
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2008-06-10 23:49:34 +00:00
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/* Check the PCI_clk sel bit */
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if (in_be32(&gur->porpllsr) & (1<<15)) {
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2008-05-27 11:47:00 +00:00
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src = "SYSCLK";
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f = CONFIG_SYS_CLK_FREQ;
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} else {
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src = "PCI_CLK";
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f = CONFIG_PCI_CLK_FREQ;
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}
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printf ("PCI1: 32 bit, %d MHz (%s)\n", f/1000000, src);
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2008-04-30 09:42:50 +00:00
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#else
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printf ("PCI1: disabled\n");
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#endif
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/*
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* Initialize local bus.
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*/
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local_bus_init ();
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return 0;
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}
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int misc_init_r (void)
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{
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/*
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* Adjust flash start and offset to detected values
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*/
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gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
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gd->bd->bi_flashoffset = 0;
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/*
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* Check if boot FLASH isn't max size
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*/
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2008-10-16 13:01:15 +00:00
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if (gd->bd->bi_flashsize < (0 - CONFIG_SYS_FLASH0)) {
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2010-06-17 16:37:20 +00:00
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set_lbc_or(0, gd->bd->bi_flashstart |
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(CONFIG_SYS_OR0_PRELIM & 0x00007fff));
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set_lbc_br(0, gd->bd->bi_flashstart |
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(CONFIG_SYS_BR0_PRELIM & 0x00007fff));
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2008-04-30 09:42:50 +00:00
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/*
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* Re-check to get correct base address
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*/
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2008-10-16 13:01:15 +00:00
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flash_get_size(gd->bd->bi_flashstart, CONFIG_SYS_MAX_FLASH_BANKS - 1);
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2008-04-30 09:42:50 +00:00
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}
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/*
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* Check if only one FLASH bank is available
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*/
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2008-10-16 13:01:15 +00:00
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if (gd->bd->bi_flashsize != CONFIG_SYS_MAX_FLASH_BANKS * (0 - CONFIG_SYS_FLASH0)) {
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2010-06-17 16:37:20 +00:00
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set_lbc_or(1, 0);
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set_lbc_br(1, 0);
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2008-04-30 09:42:50 +00:00
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/*
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* Re-do flash protection upon new addresses
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*/
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flash_protect (FLAG_PROTECT_CLEAR,
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gd->bd->bi_flashstart, 0xffffffff,
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2008-10-16 13:01:15 +00:00
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&flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
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2008-04-30 09:42:50 +00:00
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/* Monitor protection ON by default */
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flash_protect (FLAG_PROTECT_SET,
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2008-10-16 13:01:15 +00:00
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CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
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&flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
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2008-04-30 09:42:50 +00:00
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/* Environment protection ON by default */
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flash_protect (FLAG_PROTECT_SET,
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2008-09-10 20:48:06 +00:00
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CONFIG_ENV_ADDR,
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CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
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2008-10-16 13:01:15 +00:00
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&flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
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2008-04-30 09:42:50 +00:00
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/* Redundant environment protection ON by default */
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flash_protect (FLAG_PROTECT_SET,
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2008-09-10 20:48:06 +00:00
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CONFIG_ENV_ADDR_REDUND,
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Redundant Environment: protect full sector size
Several boards used different ways to specify the size of the
protected area when enabling flash write protection for the sectors
holding the environment variables: some used CONFIG_ENV_SIZE and
CONFIG_ENV_SIZE_REDUND, some used CONFIG_ENV_SECT_SIZE, and some even
a mix of both for the "normal" and the "redundant" areas.
Normally, this makes no difference at all. However, things are
different when you have to deal with boards that can come with
different types of flash chips, which may have different sector
sizes.
Here we may have to chose CONFIG_ENV_SECT_SIZE such that it fits the
biggest sector size, which may include several sectors on boards using
the smaller sector flash types. In such a case, using CONFIG_ENV_SIZE
or CONFIG_ENV_SIZE_REDUND to enable the protection may lead to the
case that only the first of these sectors get protected, while the
following ones aren't.
This is no real problem, but it can be confusing for the user -
especially on boards that use CONFIG_ENV_SECT_SIZE to protect the
"normal" areas, while using CONFIG_ENV_SIZE_REDUND for the
"redundant" area.
To avoid such inconsistencies, I changed all sucn boards that I found
to consistently use CONFIG_ENV_SECT_SIZE for protection. This should
not cause any functional changes to the code.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Paul Ruhland
Cc: Pantelis Antoniou <panto@intracom.gr>
Cc: Stefan Roese <sr@denx.de>
Cc: Gary Jennejohn <garyj@denx.de>
Cc: Dave Ellis <DGE@sixnetio.com>
Acked-by: Stefan Roese <sr@denx.de>
2009-05-14 22:16:03 +00:00
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CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
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2008-10-16 13:01:15 +00:00
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&flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
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2008-04-30 09:42:50 +00:00
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}
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2019-10-16 03:55:54 +00:00
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#if defined(CONFIG_DM_PCI)
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pci_init();
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#endif
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2008-04-30 09:42:50 +00:00
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return 0;
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}
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/*
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* Initialize Local Bus
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*/
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void local_bus_init (void)
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{
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2010-06-17 16:37:20 +00:00
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volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
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2008-10-16 13:01:15 +00:00
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volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
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2008-08-15 13:42:12 +00:00
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sys_info_t sysinfo;
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uint clkdiv;
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uint lbc_mhz;
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2008-10-16 13:01:15 +00:00
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uint lcrr = CONFIG_SYS_LBC_LCRR;
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2008-08-15 13:42:12 +00:00
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get_sys_info (&sysinfo);
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2008-12-03 23:16:34 +00:00
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clkdiv = lbc->lcrr & LCRR_CLKDIV;
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2013-08-16 09:22:26 +00:00
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lbc_mhz = sysinfo.freq_systembus / 1000000 / clkdiv;
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2008-08-15 13:42:12 +00:00
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/* Disable PLL bypass for Local Bus Clock >= 66 MHz */
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if (lbc_mhz >= 66)
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lcrr &= ~LCRR_DBYP; /* DLL Enabled */
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else
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lcrr |= LCRR_DBYP; /* DLL Bypass */
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out_be32 (&lbc->lcrr, lcrr);
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asm ("sync;isync;msync");
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2008-04-30 09:42:50 +00:00
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2008-08-15 13:42:12 +00:00
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out_be32 (&lbc->ltesr, 0xffffffff); /* Clear LBC error interrupts */
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out_be32 (&lbc->lteir, 0xffffffff); /* Enable LBC error interrupts */
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out_be32 (&ecm->eedr, 0xffffffff); /* Clear ecm errors */
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out_be32 (&ecm->eeer, 0xffffffff); /* Enable ecm errors */
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2008-04-30 09:42:50 +00:00
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2008-08-15 13:42:12 +00:00
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/* Init UPMA for FPGA access */
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out_be32 (&lbc->mamr, 0x44440); /* Use a customer-supplied value */
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upmconfig (UPMA, (uint *)UPMTableA, sizeof(UPMTableA)/sizeof(int));
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2008-08-15 13:42:13 +00:00
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2008-09-11 13:40:01 +00:00
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/* Init UPMB for Lime controller access */
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out_be32 (&lbc->mbmr, 0x444440); /* Use a customer-supplied value */
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upmconfig (UPMB, (uint *)UPMTableB, sizeof(UPMTableB)/sizeof(int));
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2008-04-30 09:42:50 +00:00
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}
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#ifdef CONFIG_BOARD_EARLY_INIT_R
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int board_early_init_r (void)
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{
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2008-10-16 13:01:15 +00:00
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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2008-08-15 13:42:12 +00:00
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/* set and reset the GPIO pin 2 which will reset the W83782G chip */
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out_8((unsigned char*)&gur->gpoutdr, 0x3F );
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out_be32((unsigned int*)&gur->gpiocr, 0x200 ); /* enable GPOut */
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udelay(200);
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out_8( (unsigned char*)&gur->gpoutdr, 0x1F );
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2008-04-30 09:42:50 +00:00
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return (0);
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}
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#endif /* CONFIG_BOARD_EARLY_INIT_R */
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2008-05-07 13:10:49 +00:00
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2016-05-19 19:23:12 +00:00
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#ifdef CONFIG_OF_BOARD_SETUP
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2014-10-24 00:58:47 +00:00
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int ft_board_setup(void *blob, bd_t *bd)
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2008-05-07 13:10:49 +00:00
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{
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2008-08-15 13:42:12 +00:00
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u32 val[12];
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int rc, i = 0;
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2008-05-07 13:10:49 +00:00
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ft_cpu_setup(blob, bd);
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2008-08-15 13:42:12 +00:00
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/* Fixup NOR FLASH mapping */
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val[i++] = 0; /* chip select number */
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val[i++] = 0; /* always 0 */
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val[i++] = gd->bd->bi_flashstart;
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val[i++] = gd->bd->bi_flashsize;
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2008-05-07 13:10:49 +00:00
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2019-10-16 03:55:51 +00:00
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#if defined(CONFIG_VIDEO_MB862xx)
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2008-10-16 13:01:15 +00:00
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if (mb862xx.frameAdrs == CONFIG_SYS_LIME_BASE) {
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2008-08-15 13:42:13 +00:00
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/* Fixup LIME mapping */
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val[i++] = 2; /* chip select number */
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val[i++] = 0; /* always 0 */
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2008-10-16 13:01:15 +00:00
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val[i++] = CONFIG_SYS_LIME_BASE;
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val[i++] = CONFIG_SYS_LIME_SIZE;
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2008-08-15 13:42:13 +00:00
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}
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2019-10-16 03:55:51 +00:00
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#endif
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2008-08-15 13:42:13 +00:00
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2008-08-15 13:42:12 +00:00
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/* Fixup FPGA mapping */
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val[i++] = 3; /* chip select number */
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val[i++] = 0; /* always 0 */
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2008-10-16 13:01:15 +00:00
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val[i++] = CONFIG_SYS_FPGA_BASE;
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val[i++] = CONFIG_SYS_FPGA_SIZE;
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2008-06-06 13:42:45 +00:00
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2008-08-15 13:42:12 +00:00
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rc = fdt_find_and_setprop(blob, "/localbus", "ranges",
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val, i * sizeof(u32), 1);
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2008-06-06 13:42:45 +00:00
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if (rc)
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2008-08-15 13:42:12 +00:00
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printf("Unable to update localbus ranges, err=%s\n",
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2008-06-06 13:42:45 +00:00
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fdt_strerror(rc));
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2014-10-24 00:58:47 +00:00
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return 0;
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2008-05-07 13:10:49 +00:00
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}
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2016-05-19 19:23:12 +00:00
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#endif /* CONFIG_OF_BOARD_SETUP */
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2008-08-15 13:42:13 +00:00
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2019-10-16 03:55:49 +00:00
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#if defined(CONFIG_OF_SEPARATE)
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void *board_fdt_blob_setup(void)
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{
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void *fw_dtb;
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fw_dtb = (void *)(CONFIG_SYS_TEXT_BASE - CONFIG_ENV_SECT_SIZE);
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if (fdt_magic(fw_dtb) != FDT_MAGIC) {
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printf("DTB is not passed via %x\n", (u32)fw_dtb);
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return NULL;
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}
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return fw_dtb;
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}
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#endif
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2019-10-16 03:55:53 +00:00
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int get_serial_clock(void)
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{
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return 333333330;
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}
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