2009-06-14 22:21:28 +00:00
|
|
|
To build RAMBOOT, replace this section the main Makefile
|
|
|
|
|
|
|
|
pcm030_config \
|
|
|
|
pcm030_RAMBOOT_config \
|
|
|
|
pcm030_LOWBOOT_config: unconfig
|
|
|
|
@ >include/config.h
|
|
|
|
@[ -z "$(findstring LOWBOOT_,$@)" ] || \
|
2010-10-07 19:51:12 +00:00
|
|
|
{ echo "CONFIG_SYS_TEXT_BASE = 0xFF000000" >board/phytec/pcm030/config.tmp ; \
|
2009-06-14 22:21:28 +00:00
|
|
|
echo "... with LOWBOOT configuration" ; \
|
|
|
|
}
|
|
|
|
@[ -z "$(findstring RAMBOOT_,$@)" ] || \
|
2010-10-07 19:51:12 +00:00
|
|
|
{ echo "CONFIG_SYS_TEXT_BASE = 0x00100000" >board/phycore_mpc5200b_tiny/\
|
2009-06-14 22:21:28 +00:00
|
|
|
config.tmp ; \
|
|
|
|
echo "... with RAMBOOT configuration" ; \
|
|
|
|
echo "... remember to make sure that MBAR is already \
|
|
|
|
switched to 0xF0000000 !!!" ; \
|
|
|
|
}
|
|
|
|
@$(MKCONFIG) -a pcm030 ppc mpc5xxx pcm030 phytec
|
|
|
|
@ echo "remember to set pcm030_REV to 0 for rev 1245.0 rev or to 1 for rev 1245.1"
|
|
|
|
|
|
|
|
Alternative SDRAM settings:
|
|
|
|
|
|
|
|
#define SDRAM_MODE 0x018D0000
|
|
|
|
#define SDRAM_EMODE 0x40090000
|
|
|
|
#define SDRAM_CONTROL 0x715f0f00
|
|
|
|
#define SDRAM_CONFIG1 0x73722930
|
|
|
|
#define SDRAM_CONFIG2 0x47770000
|
|
|
|
|
|
|
|
/* Settings for XLB = 99 MHz */
|
|
|
|
#define SDRAM_MODE 0x008D0000
|
|
|
|
#define SDRAM_EMODE 0x40090000
|
|
|
|
#define SDRAM_CONTROL 0x714b0f00
|
|
|
|
#define SDRAM_CONFIG1 0x63611730
|
|
|
|
#define SDRAM_CONFIG2 0x47670000
|
|
|
|
|
|
|
|
The board ships default with the environment in EEPROM
|
|
|
|
Moving the environment to flash can be more reliable
|
|
|
|
|
|
|
|
#define CONFIG_ENV_IS_IN_FLASH 1
|
|
|
|
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0xfe0000)
|
|
|
|
#define CONFIG_ENV_SIZE 0x20000
|
|
|
|
#define CONFIG_ENV_SECT_SIZE 0x20000
|