2016-05-13 21:50:29 +00:00
|
|
|
menu "Mailbox Controller Support"
|
|
|
|
|
|
|
|
config DM_MAILBOX
|
|
|
|
bool "Enable mailbox controllers using Driver Model"
|
|
|
|
depends on DM && OF_CONTROL
|
|
|
|
help
|
|
|
|
Enable support for the mailbox driver class. Mailboxes provide the
|
|
|
|
ability to transfer small messages and/or notifications from one
|
|
|
|
CPU to another CPU, or sometimes to dedicated HW modules. They form
|
|
|
|
the basis of a variety of inter-process/inter-CPU communication
|
|
|
|
protocols.
|
|
|
|
|
2016-05-16 23:41:37 +00:00
|
|
|
config SANDBOX_MBOX
|
|
|
|
bool "Enable the sandbox mailbox test driver"
|
|
|
|
depends on DM_MAILBOX && SANDBOX
|
|
|
|
help
|
|
|
|
Enable support for a test mailbox implementation, which simply echos
|
|
|
|
back a modified version of any message that is sent.
|
|
|
|
|
2016-06-17 15:43:57 +00:00
|
|
|
config TEGRA_HSP
|
|
|
|
bool "Enable Tegra HSP controller support"
|
2020-05-06 12:02:41 +00:00
|
|
|
depends on DM_MAILBOX && ARCH_TEGRA
|
2016-06-17 15:43:57 +00:00
|
|
|
help
|
|
|
|
This enables support for the NVIDIA Tegra HSP Hw module, which
|
|
|
|
implements doorbells, mailboxes, semaphores, and shared interrupts.
|
|
|
|
|
2019-05-14 09:20:34 +00:00
|
|
|
config STM32_IPCC
|
|
|
|
bool "Enable STM32 IPCC controller support"
|
|
|
|
depends on DM_MAILBOX && ARCH_STM32MP
|
|
|
|
help
|
|
|
|
This enables support for the STM32MP IPCC Hw module, which
|
|
|
|
implements doorbells between 2 processors.
|
|
|
|
|
2018-08-27 10:27:48 +00:00
|
|
|
config K3_SEC_PROXY
|
|
|
|
bool "Texas Instruments K3 Secure Proxy Driver"
|
|
|
|
depends on DM_MAILBOX && ARCH_K3
|
|
|
|
help
|
|
|
|
An implementation of Secure proxy slave driver for K3 SoCs from
|
|
|
|
Texas Instruments. Secure proxy is a communication entity mainly
|
|
|
|
used for communication between multiple processors with the SoC.
|
|
|
|
Select this driver if your platform has support for this hardware
|
|
|
|
block.
|
|
|
|
|
2019-09-27 10:36:56 +00:00
|
|
|
config ZYNQMP_IPI
|
|
|
|
bool "Xilinx ZynqMP IPI controller support"
|
|
|
|
depends on DM_MAILBOX && ARCH_ZYNQMP
|
|
|
|
help
|
|
|
|
This enables support for the Xilinx ZynqMP Inter Processor Interrupt
|
|
|
|
communication controller.
|
2016-05-13 21:50:29 +00:00
|
|
|
endmenu
|