2018-03-27 11:43:05 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2014-01-08 20:18:29 +00:00
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/*
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* Xilinx ZC770 XM013 board DTS
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*
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* Copyright (C) 2013 Xilinx, Inc.
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*/
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/dts-v1/;
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#include "zynq-7000.dtsi"
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/ {
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2018-07-12 04:10:20 +00:00
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model = "Xilinx ZC770 XM013 board";
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2014-01-08 20:18:29 +00:00
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compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
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2014-05-15 11:37:54 +00:00
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2014-05-15 11:37:55 +00:00
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aliases {
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2015-07-22 09:36:32 +00:00
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ethernet0 = &gem1;
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i2c0 = &i2c1;
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2014-05-15 11:37:55 +00:00
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serial0 = &uart0;
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2016-04-07 11:08:35 +00:00
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spi0 = &qspi;
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spi1 = &spi0;
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2014-05-15 11:37:55 +00:00
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};
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2015-07-22 09:36:32 +00:00
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chosen {
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2016-04-07 09:15:00 +00:00
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bootargs = "";
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2016-01-12 12:56:44 +00:00
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stdout-path = "serial0:115200n8";
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2015-07-22 09:36:32 +00:00
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};
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2016-11-11 12:11:37 +00:00
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memory@0 {
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2014-05-15 11:37:54 +00:00
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device_type = "memory";
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2015-07-22 09:36:32 +00:00
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reg = <0x0 0x40000000>;
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};
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};
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&can1 {
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status = "okay";
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};
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&gem1 {
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status = "okay";
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phy-mode = "rgmii-id";
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phy-handle = <ðernet_phy>;
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ethernet_phy: ethernet-phy@7 {
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reg = <7>;
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2017-03-06 12:47:19 +00:00
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device_type = "ethernet-phy";
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2014-05-15 11:37:54 +00:00
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};
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2014-01-08 20:18:29 +00:00
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};
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2015-07-22 09:36:32 +00:00
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&i2c1 {
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status = "okay";
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clock-frequency = <400000>;
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si570: clock-generator@55 {
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#clock-cells = <0>;
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compatible = "silabs,si570";
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temperature-stability = <50>;
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reg = <0x55>;
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factory-fout = <156250000>;
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clock-frequency = <148500000>;
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};
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};
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2016-04-07 11:08:35 +00:00
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&qspi {
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status = "okay";
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};
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2016-01-14 12:09:16 +00:00
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&spi0 {
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status = "okay";
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num-cs = <4>;
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is-decoded-cs = <0>;
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2019-09-26 10:53:09 +00:00
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eeprom: eeprom@2 {
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2016-01-14 12:09:16 +00:00
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compatible = "atmel,at25";
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reg = <2>;
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spi-max-frequency = <1000000>;
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2020-11-26 13:25:04 +00:00
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size = <8192>;
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address-width = <16>;
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pagesize = <32>;
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2016-01-14 12:09:16 +00:00
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};
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};
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2015-07-22 09:36:32 +00:00
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&uart0 {
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2015-10-18 01:41:24 +00:00
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u-boot,dm-pre-reloc;
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2015-07-22 09:36:32 +00:00
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status = "okay";
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};
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