2018-05-06 21:58:06 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0+
|
2013-08-07 15:08:03 +00:00
|
|
|
/*
|
|
|
|
* Copyright (C) 2013 Altera Corporation <www.altera.com>
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
|
|
#include <common.h>
|
|
|
|
#include <asm/io.h>
|
2015-08-24 09:51:46 +00:00
|
|
|
#include <asm/arch/reset_manager.h>
|
2013-08-07 15:08:03 +00:00
|
|
|
|
|
|
|
static const struct socfpga_reset_manager *reset_manager_base =
|
|
|
|
(void *)SOCFPGA_RSTMGR_ADDRESS;
|
2015-07-09 02:27:28 +00:00
|
|
|
|
2013-08-07 15:08:03 +00:00
|
|
|
/*
|
|
|
|
* Write the reset manager register to cause reset
|
|
|
|
*/
|
|
|
|
void reset_cpu(ulong addr)
|
|
|
|
{
|
|
|
|
/* request a warm reset */
|
2017-04-25 18:44:34 +00:00
|
|
|
writel(1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB,
|
|
|
|
&reset_manager_base->ctrl);
|
2013-08-07 15:08:03 +00:00
|
|
|
/*
|
|
|
|
* infinite loop here as watchdog will trigger and reset
|
|
|
|
* the processor
|
|
|
|
*/
|
|
|
|
while (1)
|
|
|
|
;
|
|
|
|
}
|