2011-04-14 13:11:44 +00:00
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/*
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* Copyright (C) 2007 Freescale Semiconductor, Inc.
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*
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* Copyright (C) 2011 Matrix Vision GmbH
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* Andre Schwarz <andre.schwarz@matrix-vision.de>
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2011-04-14 13:11:44 +00:00
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*/
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#include <common.h>
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#include <hwconfig.h>
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#include <i2c.h>
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#include <spi.h>
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#include <asm/io.h>
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#include <asm/fsl_mpc83xx_serdes.h>
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#include <fdt_support.h>
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#include <spd_sdram.h>
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#include "mergerbox.h"
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#include "fpga.h"
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#include "../common/mv_common.h"
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static void setup_serdes(void)
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{
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fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
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FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
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fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
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FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
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}
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#if defined(CONFIG_SYS_DRAM_TEST)
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int testdram(void)
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{
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uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START;
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uint *pend = (uint *) CONFIG_SYS_MEMTEST_END;
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uint *p;
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printf("Testing DRAM from 0x%08x to 0x%08x\n",
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CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END);
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printf("DRAM test phase 1:\n");
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for (p = pstart; p < pend; p++)
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*p = 0xaaaaaaaa;
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for (p = pstart; p < pend; p++) {
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if (*p != 0xaaaaaaaa) {
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printf("DRAM test fails at: %08x\n", (uint) p);
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return 1;
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}
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}
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printf("DRAM test phase 2:\n");
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for (p = pstart; p < pend; p++)
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*p = 0x55555555;
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for (p = pstart; p < pend; p++) {
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if (*p != 0x55555555) {
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printf("DRAM test fails at: %08x\n", (uint) p);
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return 1;
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}
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}
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printf("DRAM test passed.\n");
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return 0;
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}
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#endif
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phys_size_t initdram(int board_type)
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{
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u32 msize;
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volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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volatile clk83xx_t *clk = (clk83xx_t *)&immr->clk;
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/* Enable PCI_CLK[0:1] */
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clk->occr |= 0xc0000000;
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udelay(2000);
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#if defined(CONFIG_SPD_EEPROM)
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msize = spd_sdram();
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#else
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immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
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u32 msize_log2;
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msize = CONFIG_SYS_DDR_SIZE;
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msize_log2 = __ilog2(msize);
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im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000;
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im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
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im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE;
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udelay(50000);
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im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL;
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udelay(1000);
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im->ddr.csbnds[0].csbnds = CONFIG_SYS_DDR_CS0_BNDS;
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im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG;
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udelay(1000);
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im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;
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im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
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im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
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im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3;
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im->ddr.sdram_cfg = CONFIG_SYS_DDR_SDRAM_CFG;
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im->ddr.sdram_cfg2 = CONFIG_SYS_DDR_SDRAM_CFG2;
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im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE;
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im->ddr.sdram_mode2 = CONFIG_SYS_DDR_MODE2;
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im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL;
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__asm__ __volatile__("sync");
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udelay(1000);
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im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
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udelay(2000);
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#endif
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setup_serdes();
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return msize << 20;
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}
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int checkboard(void)
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{
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puts("Board: Matrix Vision MergerBox\n");
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return 0;
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}
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int misc_init_r(void)
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{
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u16 dim;
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int result;
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volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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volatile gpio83xx_t *gpio = (gpio83xx_t *)&immr->gpio[1];
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unsigned char mac[6], mac_verify[6];
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char *s = getenv("reset_env");
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for (dim = 10; dim < 180; dim += 5) {
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mergerbox_tft_dim(dim);
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udelay(100000);
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}
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if (s)
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mv_reset_environment();
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i2c_read(SPD_EEPROM_ADDRESS, 0x80, 2, mac, sizeof(mac));
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/* check if Matrix Vision prefix present and export to env */
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if (mac[0] == 0x00 && mac[1] == 0x0c && mac[2] == 0x8d) {
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printf("valid MAC found in eeprom: %pM\n", mac);
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eth_setenv_enetaddr("ethaddr", mac);
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} else {
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printf("no valid MAC found in eeprom.\n");
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/* no: check the env */
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if (!eth_getenv_enetaddr("ethaddr", mac)) {
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printf("no valid MAC found in env either.\n");
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/* TODO: ask for valid MAC */
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} else {
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printf("valid MAC found in env: %pM\n", mac);
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printf("updating MAC in eeprom.\n");
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do {
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result = test_and_clear_bit(20, &gpio->dat);
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if (result)
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printf("unprotect EEPROM failed !\n");
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udelay(20000);
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} while(result);
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i2c_write(SPD_EEPROM_ADDRESS, 0x80, 2, mac, 6);
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udelay(20000);
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do {
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result = test_and_set_bit(20, &gpio->dat);
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if (result)
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printf("protect EEPROM failed !\n");
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udelay(20000);
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} while(result);
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printf("verify MAC %pM ... ", mac);
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i2c_read(SPD_EEPROM_ADDRESS, 0x80, 2, mac_verify, 6);
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if (!strncmp((char *)mac, (char *)mac_verify, 6))
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printf("ok.\n");
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else
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/* TODO: retry or do something useful */
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printf("FAILED (got %pM) !\n", mac_verify);
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}
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}
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return 0;
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}
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int spi_cs_is_valid(unsigned int bus, unsigned int cs)
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{
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return bus == 0 && cs == 0;
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}
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void spi_cs_activate(struct spi_slave *slave)
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{
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volatile gpio83xx_t *iopd = &((immap_t *)CONFIG_SYS_IMMR)->gpio[0];
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iopd->dat &= ~TFT_SPI_CPLD_CS;
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}
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void spi_cs_deactivate(struct spi_slave *slave)
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{
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volatile gpio83xx_t *iopd = &((immap_t *)CONFIG_SYS_IMMR)->gpio[0];
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iopd->dat |= TFT_SPI_CPLD_CS;
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}
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/* control backlight pwm (display brightness).
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* allow values 0-250 with 0 = turn off and 250 = max brightness
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*/
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void mergerbox_tft_dim(u16 value)
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{
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struct spi_slave *slave;
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u16 din;
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u16 dout = 0;
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if (value > 0 && value < 250)
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dout = 0x4000 | value;
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slave = spi_setup_slave(0, 0, 1000000, SPI_MODE_0 | SPI_CS_HIGH);
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spi_claim_bus(slave);
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spi_xfer(slave, 16, &dout, &din, SPI_XFER_BEGIN | SPI_XFER_END);
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spi_release_bus(slave);
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spi_free_slave(slave);
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}
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void ft_board_setup(void *blob, bd_t *bd)
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{
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ft_cpu_setup(blob, bd);
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fdt_fixup_dr_usb(blob, bd);
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ft_pci_setup(blob, bd);
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}
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