2018-05-06 21:58:06 +00:00
|
|
|
/* SPDX-License-Identifier: GPL-2.0+ */
|
2014-10-22 10:13:17 +00:00
|
|
|
/*
|
|
|
|
* (C) Copyright 2011
|
|
|
|
* Marvell Semiconductor <www.marvell.com>
|
|
|
|
* Written-by: Lei Wen <leiwen@marvell.com>
|
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This file should be included in board config header file.
|
|
|
|
*
|
2015-04-25 04:29:49 +00:00
|
|
|
* It supports common definitions for MVEBU platforms
|
2014-10-22 10:13:17 +00:00
|
|
|
*/
|
|
|
|
|
2015-04-25 04:29:47 +00:00
|
|
|
#ifndef _MVEBU_CONFIG_H
|
|
|
|
#define _MVEBU_CONFIG_H
|
2014-10-22 10:13:17 +00:00
|
|
|
|
|
|
|
#include <asm/arch/soc.h>
|
|
|
|
|
2016-02-10 06:23:00 +00:00
|
|
|
#if defined(CONFIG_ARMADA_XP) || defined(CONFIG_ARMADA_375) \
|
2019-04-11 10:22:50 +00:00
|
|
|
|| defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_MSYS)
|
2015-12-21 12:56:33 +00:00
|
|
|
/*
|
|
|
|
* Set this for the common xor register definitions needed in dram.c
|
|
|
|
* for A38x as well here.
|
|
|
|
*/
|
2014-10-22 10:13:17 +00:00
|
|
|
#define MV88F78X60 /* for the DDR training bin_hdr code */
|
2015-04-25 04:29:49 +00:00
|
|
|
#endif
|
2014-10-22 10:13:17 +00:00
|
|
|
|
2015-11-18 11:44:29 +00:00
|
|
|
#define CONFIG_SYS_L2_PL310
|
|
|
|
|
2014-10-22 10:13:17 +00:00
|
|
|
/* end of 16M scrubbed by training in bootrom */
|
|
|
|
#define CONFIG_SYS_INIT_SP_ADDR 0x00FF0000
|
|
|
|
|
|
|
|
#define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE
|
|
|
|
|
2015-11-20 12:51:57 +00:00
|
|
|
/* Needed for SPI NOR booting in SPL */
|
|
|
|
#define CONFIG_DM_SEQ_ALIAS 1
|
|
|
|
|
2014-10-22 10:13:17 +00:00
|
|
|
/*
|
|
|
|
* Ethernet Driver configuration
|
|
|
|
*/
|
|
|
|
#ifdef CONFIG_CMD_NET
|
2015-11-24 08:15:22 +00:00
|
|
|
#define CONFIG_ARP_TIMEOUT 200
|
|
|
|
#define CONFIG_NET_RETRY_COUNT 50
|
2014-10-22 10:13:17 +00:00
|
|
|
#endif /* CONFIG_CMD_NET */
|
|
|
|
|
|
|
|
/*
|
|
|
|
* I2C related stuff
|
|
|
|
*/
|
|
|
|
#ifdef CONFIG_CMD_I2C
|
|
|
|
#ifndef CONFIG_SYS_I2C_SOFT
|
|
|
|
#define CONFIG_I2C_MVTWSI
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
2015-10-22 10:36:31 +00:00
|
|
|
/* Use common timer */
|
|
|
|
#define CONFIG_SYS_TIMER_COUNTS_DOWN
|
|
|
|
#define CONFIG_SYS_TIMER_COUNTER (MVEBU_TIMER_BASE + 0x14)
|
|
|
|
#define CONFIG_SYS_TIMER_RATE 25000000
|
|
|
|
|
2015-04-25 04:29:47 +00:00
|
|
|
#endif /* __MVEBU_CONFIG_H */
|