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40 lines
999 B
C
40 lines
999 B
C
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/*
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* ti_armv7_omap.h
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*
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* Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* The various ARMv7 SoCs from TI all share a number of IP blocks when
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* implementing a given feature. This is meant to isolate the features
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* that are based on OMAP architecture.
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*/
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#ifndef __CONFIG_TI_ARMV7_OMAP_H__
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#define __CONFIG_TI_ARMV7_OMAP_H__
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/* I2C IP block */
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#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP24XX
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/* SPI IP Block */
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#define CONFIG_OMAP3_SPI
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/*
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* GPMC NAND block. We support 1 device and the physical address to
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* access CS0 at is 0x8000000.
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*/
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#ifdef CONFIG_NAND
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#define CONFIG_NAND_OMAP_GPMC
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#ifndef CONFIG_SYS_NAND_BASE
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#define CONFIG_SYS_NAND_BASE 0x8000000
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#endif
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_CMD_NAND
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#endif
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/* Now for the remaining common defines */
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#include <configs/ti_armv7_common.h>
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#endif /* __CONFIG_TI_ARMV7_OMAP_H__ */
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