2012-07-05 17:21:46 +00:00
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/*
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* Copyright (C) 2012 Atmel Corporation
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*
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* Configuation settings for the AT91SAM9X5EK board.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H__
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#define __CONFIG_H__
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#include <asm/hardware.h>
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
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#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_AT91SAM9X5EK
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#define CONFIG_AT91FAMILY
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_DISPLAY_CPUINFO
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/* general purpose I/O */
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#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
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#define CONFIG_AT91_GPIO
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/* serial console */
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#define CONFIG_ATMEL_USART
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_SYS
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/* LCD */
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#define CONFIG_LCD
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#define LCD_BPP LCD_COLOR16
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#define LCD_OUTPUT_BPP 24
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#define CONFIG_LCD_LOGO
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#undef LCD_TEST_PATTERN
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#define CONFIG_LCD_INFO
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#define CONFIG_LCD_INFO_BELOW_LOGO
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#define CONFIG_SYS_WHITE_ON_BLACK
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#define CONFIG_ATMEL_HLCD
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#define CONFIG_ATMEL_LCD_RGB565
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#define CONFIG_BOOTDELAY 3
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_IMLS
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#undef CONFIG_CMD_LOADS
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_NAND
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2012-08-19 20:32:24 +00:00
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#define CONFIG_CMD_SF
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2012-07-05 17:21:46 +00:00
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/* SDRAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE 0x20000000
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#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
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/* DataFlash */
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2012-08-19 20:32:24 +00:00
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#ifdef CONFIG_CMD_SF
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#define CONFIG_ATMEL_SPI
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2012-07-05 17:21:46 +00:00
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_ATMEL
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2012-08-19 20:32:24 +00:00
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#define CONFIG_SF_DEFAULT_SPEED 30000000
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2012-07-05 17:21:46 +00:00
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#endif
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/* no NOR flash */
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#define CONFIG_SYS_NO_FLASH
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/* NAND flash */
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_DBW_8 1
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/* our ALE is AD21 */
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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/* our CLE is AD22 */
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
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2012-08-23 00:05:38 +00:00
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/* PMECC & PMERRLOC */
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#define CONFIG_ATMEL_NAND_HWECC 1
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#define CONFIG_ATMEL_NAND_HW_PMECC 1
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#define CONFIG_PMECC_CAP 2
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#define CONFIG_PMECC_SECTOR_SIZE 512
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#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
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2012-07-05 17:21:46 +00:00
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#define CONFIG_MTD_DEVICE
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_RBTREE
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#define CONFIG_LZO
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#define CONFIG_CMD_UBI
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#define CONFIG_CMD_UBIFS
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#endif
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/* Ethernet */
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#define CONFIG_MACB
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#define CONFIG_RMII
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_MACB_SEARCH_PHY
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#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END 0x26e00000
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#ifdef CONFIG_SYS_USE_NANDFLASH
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/* bootstrap + u-boot + env + linux in nandflash */
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_OFFSET 0xc0000
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#define CONFIG_ENV_OFFSET_REDUND 0x100000
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#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
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#define CONFIG_BOOTCOMMAND "nand read " \
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"0x22000000 0x200000 0x300000; " \
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"bootm 0x22000000"
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2012-08-19 20:32:24 +00:00
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#else
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#ifdef CONFIG_SYS_USE_SPIFLASH
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/* bootstrap + u-boot + env + linux in spi flash */
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_ENV_OFFSET 0x5000
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#define CONFIG_ENV_SIZE 0x3000
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#define CONFIG_ENV_SECT_SIZE 0x1000
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#define CONFIG_ENV_SPI_MAX_HZ 30000000
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#define CONFIG_BOOTCOMMAND "sf probe 0; " \
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"sf read 0x22000000 0x100000 0x300000; " \
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"bootm 0x22000000"
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#endif
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2012-07-05 17:21:46 +00:00
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#endif
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#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \
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"mtdparts=atmel_nand:" \
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"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
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"root=/dev/mtdblock1 rw " \
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"rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs"
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_PROMPT "U-Boot> "
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \
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+ 16)
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_HUSH_PARSER
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
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#ifdef CONFIG_USE_IRQ
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#error CONFIG_USE_IRQ not supported
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#endif
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#endif
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