2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2011-04-08 07:10:54 +00:00
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/*
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2013-09-30 09:44:43 +00:00
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* Copyright 2009-2010, 2013 Freescale Semiconductor, Inc.
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2011-04-08 07:10:54 +00:00
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* Jun-jie Zhang <b18070@freescale.com>
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* Mingkai Hu <Mingkai.hu@freescale.com>
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*/
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2016-01-12 06:41:18 +00:00
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2011-04-08 07:10:54 +00:00
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#include <common.h>
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#include <miiphy.h>
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#include <phy.h>
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#include <fsl_mdio.h>
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#include <asm/io.h>
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2016-09-21 02:28:55 +00:00
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#include <linux/errno.h>
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2020-07-16 10:09:11 +00:00
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#include <tsec.h>
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2011-04-08 07:10:54 +00:00
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2020-04-30 12:59:59 +00:00
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#ifdef CONFIG_DM_MDIO
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struct tsec_mdio_priv {
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struct tsec_mii_mng __iomem *regs;
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};
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#endif
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2013-09-30 09:44:43 +00:00
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void tsec_local_mdio_write(struct tsec_mii_mng __iomem *phyregs, int port_addr,
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2011-04-08 07:10:54 +00:00
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int dev_addr, int regnum, int value)
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{
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int timeout = 1000000;
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out_be32(&phyregs->miimadd, (port_addr << 8) | (regnum & 0x1f));
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out_be32(&phyregs->miimcon, value);
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2014-09-05 05:52:37 +00:00
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/* Memory barrier */
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mb();
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2011-04-08 07:10:54 +00:00
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while ((in_be32(&phyregs->miimind) & MIIMIND_BUSY) && timeout--)
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;
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}
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2013-09-30 09:44:43 +00:00
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int tsec_local_mdio_read(struct tsec_mii_mng __iomem *phyregs, int port_addr,
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2011-04-08 07:10:54 +00:00
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int dev_addr, int regnum)
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{
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int value;
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int timeout = 1000000;
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2016-01-12 06:41:18 +00:00
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/* Put the address of the phy, and the register number into MIIMADD */
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2011-04-08 07:10:54 +00:00
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out_be32(&phyregs->miimadd, (port_addr << 8) | (regnum & 0x1f));
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/* Clear the command register, and wait */
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out_be32(&phyregs->miimcom, 0);
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2014-09-05 05:52:37 +00:00
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/* Memory barrier */
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mb();
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2011-04-08 07:10:54 +00:00
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/* Initiate a read command, and wait */
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out_be32(&phyregs->miimcom, MIIMCOM_READ_CYCLE);
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2014-09-05 05:52:37 +00:00
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/* Memory barrier */
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mb();
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2011-04-08 07:10:54 +00:00
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/* Wait for the the indication that the read is done */
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while ((in_be32(&phyregs->miimind) & (MIIMIND_NOTVALID | MIIMIND_BUSY))
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&& timeout--)
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;
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/* Grab the value read from the PHY */
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value = in_be32(&phyregs->miimstat);
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return value;
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}
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2020-04-30 12:59:59 +00:00
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#if defined(CONFIG_PHYLIB)
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2011-04-08 07:10:54 +00:00
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static int fsl_pq_mdio_reset(struct mii_dev *bus)
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{
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2020-04-30 12:59:59 +00:00
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struct tsec_mii_mng __iomem *regs;
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#ifndef CONFIG_DM_MDIO
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regs = (struct tsec_mii_mng __iomem *)bus->priv;
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#else
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struct tsec_mdio_priv *priv;
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if (!bus->priv)
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return -EINVAL;
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priv = dev_get_priv(bus->priv);
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regs = priv->regs;
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#endif
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2011-04-08 07:10:54 +00:00
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/* Reset MII (due to new addresses) */
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out_be32(®s->miimcfg, MIIMCFG_RESET_MGMT);
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out_be32(®s->miimcfg, MIIMCFG_INIT_VALUE);
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while (in_be32(®s->miimind) & MIIMIND_BUSY)
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;
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return 0;
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}
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2020-04-30 12:59:59 +00:00
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#endif
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2011-04-08 07:10:54 +00:00
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int tsec_phy_read(struct mii_dev *bus, int addr, int dev_addr, int regnum)
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{
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2020-04-30 12:59:59 +00:00
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struct tsec_mii_mng __iomem *phyregs;
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#ifndef CONFIG_DM_MDIO
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phyregs = (struct tsec_mii_mng __iomem *)bus->priv;
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#else
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struct tsec_mdio_priv *priv;
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if (!bus->priv)
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return -EINVAL;
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priv = dev_get_priv(bus->priv);
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phyregs = priv->regs;
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#endif
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2011-04-08 07:10:54 +00:00
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return tsec_local_mdio_read(phyregs, addr, dev_addr, regnum);
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}
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int tsec_phy_write(struct mii_dev *bus, int addr, int dev_addr, int regnum,
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u16 value)
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{
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2020-04-30 12:59:59 +00:00
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struct tsec_mii_mng __iomem *phyregs;
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#ifndef CONFIG_DM_MDIO
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phyregs = (struct tsec_mii_mng __iomem *)bus->priv;
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#else
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struct tsec_mdio_priv *priv;
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if (!bus->priv)
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return -EINVAL;
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priv = dev_get_priv(bus->priv);
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phyregs = priv->regs;
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#endif
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2011-04-08 07:10:54 +00:00
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tsec_local_mdio_write(phyregs, addr, dev_addr, regnum, value);
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return 0;
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}
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2020-04-30 12:59:59 +00:00
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#ifndef CONFIG_DM_MDIO
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2020-06-26 06:13:33 +00:00
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int fsl_pq_mdio_init(struct bd_info *bis, struct fsl_pq_mdio_info *info)
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2011-04-08 07:10:54 +00:00
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{
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struct mii_dev *bus = mdio_alloc();
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if (!bus) {
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printf("Failed to allocate FSL MDIO bus\n");
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return -1;
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}
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bus->read = tsec_phy_read;
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bus->write = tsec_phy_write;
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bus->reset = fsl_pq_mdio_reset;
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2015-12-30 13:05:58 +00:00
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strcpy(bus->name, info->name);
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2011-04-08 07:10:54 +00:00
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2013-09-30 09:44:43 +00:00
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bus->priv = (void *)info->regs;
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2011-04-08 07:10:54 +00:00
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return mdio_register(bus);
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}
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2020-04-30 12:59:59 +00:00
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#else /* CONFIG_DM_MDIO */
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#if defined(CONFIG_PHYLIB)
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static int tsec_mdio_read(struct udevice *dev, int addr, int devad, int reg)
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{
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struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) :
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NULL;
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if (pdata && pdata->mii_bus)
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return tsec_phy_read(pdata->mii_bus, addr, devad, reg);
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return -1;
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}
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static int tsec_mdio_write(struct udevice *dev, int addr, int devad, int reg,
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u16 val)
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{
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struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) :
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NULL;
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if (pdata && pdata->mii_bus)
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return tsec_phy_write(pdata->mii_bus, addr, devad, reg, val);
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return -1;
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}
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static int tsec_mdio_reset(struct udevice *dev)
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{
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struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) :
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NULL;
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if (pdata && pdata->mii_bus)
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return fsl_pq_mdio_reset(pdata->mii_bus);
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return -1;
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}
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static const struct mdio_ops tsec_mdio_ops = {
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.read = tsec_mdio_read,
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.write = tsec_mdio_write,
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.reset = tsec_mdio_reset,
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};
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2020-07-16 10:09:11 +00:00
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static struct fsl_pq_mdio_data etsec2_data = {
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.mdio_regs_off = TSEC_MDIO_REGS_OFFSET,
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};
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static struct fsl_pq_mdio_data gianfar_data = {
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.mdio_regs_off = 0x0,
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};
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static struct fsl_pq_mdio_data fman_data = {
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.mdio_regs_off = 0x0,
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};
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2020-04-30 12:59:59 +00:00
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static const struct udevice_id tsec_mdio_ids[] = {
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2020-07-16 10:09:11 +00:00
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{ .compatible = "fsl,gianfar-tbi", .data = (ulong)&gianfar_data },
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{ .compatible = "fsl,gianfar-mdio", .data = (ulong)&gianfar_data },
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{ .compatible = "fsl,etsec2-tbi", .data = (ulong)&etsec2_data },
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{ .compatible = "fsl,etsec2-mdio", .data = (ulong)&etsec2_data },
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{ .compatible = "fsl,fman-mdio", .data = (ulong)&fman_data },
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2020-04-30 12:59:59 +00:00
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{}
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};
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static int tsec_mdio_probe(struct udevice *dev)
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{
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2020-07-16 10:09:11 +00:00
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struct fsl_pq_mdio_data *data;
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2020-04-30 12:59:59 +00:00
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struct tsec_mdio_priv *priv = (dev) ? dev_get_priv(dev) : NULL;
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struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) :
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NULL;
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if (!dev) {
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printf("%s dev = NULL\n", __func__);
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return -1;
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}
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if (!priv) {
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printf("dev_get_priv(dev %p) = NULL\n", dev);
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return -1;
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}
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2020-07-16 10:09:11 +00:00
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data = (struct fsl_pq_mdio_data *)dev_get_driver_data(dev);
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priv->regs = dev_remap_addr(dev) + data->mdio_regs_off;
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2020-04-30 12:59:59 +00:00
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debug("%s priv %p @ regs %p, pdata %p\n", __func__,
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priv, priv->regs, pdata);
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return 0;
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}
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static int tsec_mdio_remove(struct udevice *dev)
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{
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return 0;
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}
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U_BOOT_DRIVER(tsec_mdio) = {
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.name = "tsec_mdio",
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.id = UCLASS_MDIO,
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.of_match = tsec_mdio_ids,
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.probe = tsec_mdio_probe,
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.remove = tsec_mdio_remove,
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.ops = &tsec_mdio_ops,
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2020-12-03 23:55:17 +00:00
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.priv_auto = sizeof(struct tsec_mdio_priv),
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2020-12-03 23:55:18 +00:00
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.plat_auto = sizeof(struct mdio_perdev_priv),
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2020-04-30 12:59:59 +00:00
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};
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#endif /* CONFIG_PHYLIB */
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#endif /* CONFIG_DM_MDIO */
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