2022-05-26 08:52:27 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2010-2011 Freescale Semiconductor, Inc.
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* Copyright 2020 NXP
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* Copyright 2022 Pali Rohár <pali@kernel.org>
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*/
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#include <linux/stringify.h>
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2022-11-16 18:10:41 +00:00
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#if !defined(CONFIG_SYS_SPD_BUS_NUM) || !defined(CFG_SYS_I2C_PCA9557_ADDR)
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#error "CONFIG_SYS_SPD_BUS_NUM and CFG_SYS_I2C_PCA9557_ADDR are required"
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2022-05-26 08:52:27 +00:00
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#endif
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2022-11-16 18:10:41 +00:00
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#define __BOOTSRC_CMD(src, msk) i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CFG_SYS_I2C_PCA9557_ADDR 1 src 1; i2c mw CFG_SYS_I2C_PCA9557_ADDR 3 msk 1
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2022-05-26 08:52:27 +00:00
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#define __VAR_CMD(var, cmd) __stringify(var=cmd\0)
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#define __VAR_CMD_RST(var, cmd) __VAR_CMD(var, cmd; reset)
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#ifdef __SW_NOR_BANK_LO
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#define MAP_NOR_LO_CMD(var, ...) __VAR_CMD(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_NOR_BANK_LO, __SW_NOR_BANK_MASK))
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#else
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#define MAP_NOR_LO_CMD(var, ...) ""
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#endif
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#ifdef __SW_NOR_BANK_UP
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#define MAP_NOR_UP_CMD(var, ...) __VAR_CMD(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_NOR_BANK_UP, __SW_NOR_BANK_MASK))
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#else
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#define MAP_NOR_UP_CMD(var, ...) ""
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#endif
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#ifdef __SW_BOOT_NOR
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#define RST_NOR_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NOR, __SW_BOOT_MASK))
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#else
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#define RST_NOR_CMD(var, ...) ""
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#endif
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2022-04-25 14:50:43 +00:00
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#ifdef __SW_BOOT_NOR_BANK_LO
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#define RST_NOR_LO_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NOR_BANK_LO, __SW_BOOT_MASK))
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#else
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#define RST_NOR_LO_CMD(var, ...) ""
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#endif
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#ifdef __SW_BOOT_NOR_BANK_UP
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#define RST_NOR_UP_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NOR_BANK_UP, __SW_BOOT_MASK))
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#else
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#define RST_NOR_UP_CMD(var, ...) ""
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#endif
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2022-05-26 08:52:27 +00:00
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#ifdef __SW_BOOT_SPI
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#define RST_SPI_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_SPI, __SW_BOOT_MASK))
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#else
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#define RST_SPI_CMD(var, ...) ""
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#endif
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#ifdef __SW_BOOT_SD
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#define RST_SD_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_SD, __SW_BOOT_MASK))
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#else
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#define RST_SD_CMD(var, ...) ""
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#endif
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2022-04-25 14:50:43 +00:00
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#ifdef __SW_BOOT_SD2
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#define RST_SD2_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_SD2, __SW_BOOT_MASK))
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#else
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#define RST_SD2_CMD(var, ...) ""
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#endif
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2022-05-26 08:52:27 +00:00
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#ifdef __SW_BOOT_NAND
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#define RST_NAND_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NAND, __SW_BOOT_MASK))
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#else
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#define RST_NAND_CMD(var, ...) ""
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#endif
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#ifdef __SW_BOOT_PCIE
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#define RST_PCIE_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_PCIE, __SW_BOOT_MASK))
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#else
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#define RST_PCIE_CMD(var, ...) ""
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#endif
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2022-04-25 14:50:43 +00:00
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#define RST_DEF_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(0x00, 0xff))
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