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https://github.com/AsahiLinux/u-boot
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76 lines
2 KiB
C
76 lines
2 KiB
C
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/*
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* This file configures the internal USB PHY in AM35X.
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*
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* Copyright (C) 2012 Ilya Yanok <ilya.yanok@gmail.com>
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*
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* Based on omap_phy_internal.c code from Linux by
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* Hema HK <hemahk@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/am35x_def.h>
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void am35x_musb_reset(void)
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{
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/* Reset the musb interface */
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clrsetbits_le32(&am35x_scm_general_regs->ip_sw_reset,
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0, USBOTGSS_SW_RST);
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clrsetbits_le32(&am35x_scm_general_regs->ip_sw_reset,
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USBOTGSS_SW_RST, 0);
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}
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void am35x_musb_phy_power(u8 on)
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{
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unsigned long start = get_timer(0);
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if (on) {
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/*
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* Start the on-chip PHY and its PLL.
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*/
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clrsetbits_le32(&am35x_scm_general_regs->devconf2,
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CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN,
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CONF2_PHY_PLLON);
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debug("Waiting for PHY clock good...\n");
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while (!(readl(&am35x_scm_general_regs->devconf2)
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& CONF2_PHYCLKGD)) {
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if (get_timer(start) > CONFIG_SYS_HZ / 10) {
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printf("musb PHY clock good timed out\n");
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break;
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}
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}
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} else {
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/*
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* Power down the on-chip PHY.
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*/
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clrsetbits_le32(&am35x_scm_general_regs->devconf2,
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CONF2_PHY_PLLON,
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CONF2_PHYPWRDN | CONF2_OTGPWRDN);
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}
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}
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void am35x_musb_clear_irq(void)
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{
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clrsetbits_le32(&am35x_scm_general_regs->lvl_intr_clr,
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0, USBOTGSS_INT_CLR);
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readl(&am35x_scm_general_regs->lvl_intr_clr);
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}
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