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u-boot/arch/arm/include/asm/config.h

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Add an architecture specific config.h for common defines We have common defines that we duplicate in various ways. Having an arch specific config.h gives us a common location for those defines. Eventually we should be able to replace this when we have proper Kconfig support. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-06 02:40:57 +00:00
/*
* Copyright 2009 Freescale Semiconductor, Inc.
*
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
2013-07-08 07:37:19 +00:00
* SPDX-License-Identifier: GPL-2.0+
Add an architecture specific config.h for common defines We have common defines that we duplicate in various ways. Having an arch specific config.h gives us a common location for those defines. Eventually we should be able to replace this when we have proper Kconfig support. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-06 02:40:57 +00:00
*/
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
ARM: add flat device tree support Based on other architectures already supported. Tested on OMAP3 Beagle board and another unnamed ARM platform. Signed-off-by: John Rigby <john.rigby@linaro.org> Tested-by: Rob Herring <rob.herring@smooth-stone.com> Acked-by: Wolfgang Denk <wd@denx.de>
2010-10-13 19:57:36 +00:00
#define CONFIG_LMB
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
arm64: core support Relocation code based on a patch by Scott Wood, which is: Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Feng <fenghua@phytium.com.cn>
2013-12-14 03:47:35 +00:00
#ifdef CONFIG_ARM64
#define CONFIG_PHYS_64BIT
#define CONFIG_STATIC_RELA
#endif
ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC Freescale LayerScape with Chassis Generation 3 is a set of SoCs with ARMv8 cores and 3rd generation of Chassis. We use different MMU setup to support memory map and cache attribute for these SoCs. MMU and cache are enabled very early to bootst performance, especially for early development on emulators. After u-boot relocates to DDR, a new MMU table with QBMan cache access is created in DDR. SMMU pagesize is set in SMMU_sACR register. Both DDR3 and DDR4 are supported. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
2014-06-23 22:15:54 +00:00
#ifdef CONFIG_FSL_LSCH3
#include <asm/arch-fsl-lsch3/config.h>
#endif
arm: ls102xa: Add Freescale LS102xA SoC support The QorIQ LS1 family is built on Layerscape architecture, the industry's first software-aware, core-agnostic networking architecture to offer unprecedented efficiency and scale. Freescale LS102xA is a set of SoCs combines two ARM Cortex-A7 cores that have been optimized for high reliability and pack the highest level of integration available for sub-3 W embedded communications processors with Layerscape architecture and with a comprehensive enablement model focused on ease of programmability. Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Jason Jin <jason.jin@freescale.com> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
2014-09-05 05:52:34 +00:00
#ifdef CONFIG_LS102XA
#include <asm/arch/config.h>
#endif
Add an architecture specific config.h for common defines We have common defines that we duplicate in various ways. Having an arch specific config.h gives us a common location for those defines. Eventually we should be able to replace this when we have proper Kconfig support. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-06 02:40:57 +00:00
#endif
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