2019-03-13 20:46:41 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
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*/
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/ {
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compatible = "fsl,mcf5301x";
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aliases {
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serial0 = &uart0;
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spi0 = &dspi0;
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2019-11-15 22:54:12 +00:00
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fec0 = &fec0;
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fec1 = &fec1;
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2019-03-13 20:46:41 +00:00
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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uart0: uart@fc060000 {
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compatible = "fsl,mcf-uart";
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reg = <0xfc060000 0x40>;
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status = "disabled";
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};
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uart1: uart@fc064000 {
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compatible = "fsl,mcf-uart";
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reg = <0xfc064000 0x40>;
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status = "disabled";
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};
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uart2: uart@fc068000 {
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compatible = "fsl,mcf-uart";
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reg = <0xfc068000 0x40>;
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status = "disabled";
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};
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dspi0: dspi@fc05c000 {
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compatible = "fsl,mcf-dspi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xfc05c000 0x100>;
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spi-max-frequency = <50000000>;
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num-cs = <4>;
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spi-mode = <0>;
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status = "disabled";
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};
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2019-11-15 22:54:12 +00:00
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fec0: ethernet@fc030000 {
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compatible = "fsl,mcf-fec";
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reg = <0xfc030000 0x200>;
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mii-base = <0>;
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max-speed = <100>;
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phy-addr = <(-1)>;
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timeout-loop = <50000>;
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status = "disabled";
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};
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fec1: ethernet@fc034000 {
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compatible = "fsl,mcf-fec";
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reg = <0xfc034000 0x800>;
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mii-base = <1>;
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max-speed = <100>;
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timeout-loop = <50000>;
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status = "disabled";
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};
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2023-04-04 22:59:27 +00:00
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i2c0: i2c@0xfc058000 {
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compatible = "fsl-i2c";
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#address-cells=<1>;
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#size-cells=<0>;
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cell-index = <0>;
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reg = <0xfc058000 0x100>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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2019-03-13 20:46:41 +00:00
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};
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};
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