2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2010-02-22 11:13:02 +00:00
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/*
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* (C) Copyright 2009
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* Marvell Semiconductor <www.marvell.com>
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* Prafulla Wadaskar <prafulla@marvell.com>
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*
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* (C) Copyright 2009
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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2012-07-05 05:37:46 +00:00
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* (C) Copyright 2011-2012
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* Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
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* Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
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2010-02-22 11:13:02 +00:00
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*/
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/*
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* for linking errors see
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* http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
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*/
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2011-06-16 12:41:15 +00:00
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#ifndef _CONFIG_KM_KIRKWOOD_H
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#define _CONFIG_KM_KIRKWOOD_H
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2010-02-22 11:13:02 +00:00
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2012-07-05 05:05:06 +00:00
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/* KM_KIRKWOOD */
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2012-05-25 01:57:13 +00:00
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#if defined(CONFIG_KM_KIRKWOOD)
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2018-03-28 12:38:20 +00:00
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#define CONFIG_HOSTNAME "km_kirkwood"
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2012-07-05 05:05:06 +00:00
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#define CONFIG_KM_DISABLE_PCIE
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/* KM_KIRKWOOD_PCI */
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2012-05-25 01:57:13 +00:00
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#elif defined(CONFIG_KM_KIRKWOOD_PCI)
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2018-03-28 12:38:20 +00:00
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#define CONFIG_HOSTNAME "km_kirkwood_pci"
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2014-08-15 08:51:48 +00:00
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#define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048"
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#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
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2012-07-05 05:05:06 +00:00
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2013-09-18 07:32:48 +00:00
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/* KM_KIRKWOOD_128M16 */
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#elif defined(CONFIG_KM_KIRKWOOD_128M16)
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2018-03-28 12:38:20 +00:00
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#define CONFIG_HOSTNAME "km_kirkwood_128m16"
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2013-09-18 07:32:48 +00:00
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#undef CONFIG_SYS_KWD_CONFIG
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2014-03-11 02:05:17 +00:00
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#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
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2013-09-18 07:32:48 +00:00
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#define CONFIG_KM_DISABLE_PCIE
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2020-01-13 14:34:02 +00:00
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/* KM_NUSA */
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#elif defined(CONFIG_KM_NUSA)
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2014-02-13 15:43:00 +00:00
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2018-03-28 12:38:20 +00:00
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#define CONFIG_HOSTNAME "kmnusa"
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2014-02-13 15:43:00 +00:00
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2012-07-05 05:37:46 +00:00
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#undef CONFIG_SYS_KWD_CONFIG
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2014-03-11 02:05:17 +00:00
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#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
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2012-07-05 05:37:46 +00:00
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2012-07-05 05:05:03 +00:00
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/* KMCOGE5UN */
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2012-07-05 05:05:02 +00:00
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#elif defined(CONFIG_KM_COGE5UN)
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#undef CONFIG_SYS_KWD_CONFIG
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2014-03-11 02:05:17 +00:00
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#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg
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2018-03-28 12:38:20 +00:00
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#define CONFIG_HOSTNAME "kmcoge5un"
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2012-07-05 05:05:02 +00:00
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#define CONFIG_KM_DISABLE_PCIE
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2012-07-05 05:05:04 +00:00
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2020-01-13 14:34:01 +00:00
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/* KM_SUSE2 */
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#elif defined(CONFIG_KM_SUSE2)
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#define CONFIG_HOSTNAME "kmsuse2"
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#undef CONFIG_SYS_KWD_CONFIG
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#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
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#define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048"
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#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
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2012-07-05 05:37:46 +00:00
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#else
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#error ("Board unsupported")
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2011-06-16 12:41:15 +00:00
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#endif
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2010-02-22 11:13:02 +00:00
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2012-07-05 05:37:46 +00:00
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/* include common defines/options for all arm based Keymile boards */
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#include "km/km_arm.h"
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#if defined(CONFIG_KM_PIGGY4_88E6352)
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/*
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* Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via
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* an Marvell 88E6352 simple switch.
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* In this case we have to change the default settings for the etherent mac.
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* There is NO ethernet phy. The ARM and Switch are conencted directly over
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* RGMII in MAC-MAC mode
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* In this case 1GBit full duplex and autoneg off
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*/
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#define PORT_SERIAL_CONTROL_VALUE ( \
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MVGBE_FORCE_LINK_PASS | \
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MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
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MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
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MVGBE_ADV_NO_FLOW_CTRL | \
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MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
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MVGBE_FORCE_BP_MODE_NO_JAM | \
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(1 << 9) /* Reserved bit has to be 1 */ | \
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MVGBE_DO_NOT_FORCE_LINK_FAIL | \
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MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
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MVGBE_DTE_ADV_0 | \
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MVGBE_MIIPHY_MAC_MODE | \
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MVGBE_AUTO_NEG_NO_CHANGE | \
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MVGBE_MAX_RX_PACKET_1552BYTE | \
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MVGBE_CLR_EXT_LOOPBACK | \
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MVGBE_SET_FULL_DUPLEX_MODE | \
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MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
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MVGBE_SET_GMII_SPEED_TO_1000 |\
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MVGBE_SET_MII_SPEED_TO_100)
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#endif
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2011-03-08 09:53:51 +00:00
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2012-07-05 05:05:03 +00:00
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#ifdef CONFIG_KM_PIGGY4_88E6061
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/*
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2019-11-25 16:24:15 +00:00
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* Some keymile boards like mgcoge5un have their PIGGY4 connected via
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2012-07-05 05:05:03 +00:00
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* an Marvell 88E6061 simple switch.
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* In this case we have to change the default settings for the
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* ethernet phy connected to the kirkwood.
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* In this case 100MB full duplex and autoneg off
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*/
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#define PORT_SERIAL_CONTROL_VALUE ( \
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MVGBE_FORCE_LINK_PASS | \
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MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
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MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
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MVGBE_ADV_NO_FLOW_CTRL | \
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MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
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MVGBE_FORCE_BP_MODE_NO_JAM | \
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(1 << 9) /* Reserved bit has to be 1 */ | \
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MVGBE_DO_NOT_FORCE_LINK_FAIL | \
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MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
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MVGBE_DTE_ADV_0 | \
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MVGBE_MIIPHY_MAC_MODE | \
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MVGBE_AUTO_NEG_NO_CHANGE | \
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MVGBE_MAX_RX_PACKET_1552BYTE | \
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MVGBE_CLR_EXT_LOOPBACK | \
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MVGBE_SET_FULL_DUPLEX_MODE | \
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MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
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MVGBE_SET_GMII_SPEED_TO_10_100 |\
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MVGBE_SET_MII_SPEED_TO_100)
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#endif
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2019-07-09 07:28:23 +00:00
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#ifdef CONFIG_KM_DISABLE_PCIE
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2012-07-05 05:05:03 +00:00
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#undef CONFIG_KIRKWOOD_PCIE_INIT
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#endif
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2012-07-05 05:05:05 +00:00
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2011-06-16 12:41:15 +00:00
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#endif /* _CONFIG_KM_KIRKWOOD */
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