2018-05-06 21:58:06 +00:00
|
|
|
/* SPDX-License-Identifier: GPL-2.0+ */
|
2005-01-09 18:21:42 +00:00
|
|
|
/*
|
|
|
|
* Configuation settings for the Sentec Cobra Board.
|
|
|
|
*
|
|
|
|
* (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* ---
|
2016-02-06 03:30:11 +00:00
|
|
|
* Version: U-Boot 1.0.0 - initial release for Sentec COBRA5272 board
|
2005-01-09 18:21:42 +00:00
|
|
|
* Date: 2004-03-29
|
|
|
|
* Author: Florian Schlote
|
|
|
|
*
|
|
|
|
* For a description of configuration options please refer also to the
|
|
|
|
* general u-boot-1.x.x/README file
|
|
|
|
* ---
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* ---
|
|
|
|
* board/config.h - configuration options, board specific
|
|
|
|
* ---
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef _CONFIG_COBRA5272_H
|
|
|
|
#define _CONFIG_COBRA5272_H
|
|
|
|
|
|
|
|
/* ---
|
|
|
|
* Defines processor clock - important for correct timings concerning serial
|
|
|
|
* interface etc.
|
|
|
|
* ---
|
|
|
|
*/
|
|
|
|
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_CLK 66000000
|
|
|
|
#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
|
2005-01-09 18:21:42 +00:00
|
|
|
|
2007-08-16 00:41:06 +00:00
|
|
|
/* Enable Dma Timer */
|
|
|
|
#define CONFIG_MCFTMR
|
2005-01-09 18:21:42 +00:00
|
|
|
|
|
|
|
/* ---
|
|
|
|
* Define baudrate for UART1 (console output, tftp, ...)
|
|
|
|
* default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
|
2008-10-16 13:01:15 +00:00
|
|
|
* CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
|
2005-01-09 18:21:42 +00:00
|
|
|
* interface
|
|
|
|
* ---
|
|
|
|
*/
|
|
|
|
|
2007-08-16 00:41:06 +00:00
|
|
|
#define CONFIG_MCFUART
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_UART_PORT (0)
|
2005-01-09 18:21:42 +00:00
|
|
|
|
|
|
|
/* ---
|
|
|
|
* set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
|
|
|
|
* timeout acc. to your needs
|
|
|
|
* #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
|
|
|
|
* for 10 sec
|
|
|
|
* ---
|
|
|
|
*/
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
#define CONFIG_WATCHDOG
|
|
|
|
#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* ---
|
|
|
|
* CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
|
|
|
|
* bootloader residing in flash ('chainloading'); if you want to use
|
|
|
|
* chainloading or want to compile a u-boot binary that can be loaded into
|
|
|
|
* RAM via BDM set
|
2008-05-20 14:00:29 +00:00
|
|
|
* "#if 0" to "#if 1"
|
2005-01-09 18:21:42 +00:00
|
|
|
* You will need a first stage bootloader then, e. g. colilo or a working BDM
|
|
|
|
* cable (Background Debug Mode)
|
|
|
|
*
|
|
|
|
* Setting #if 0: u-boot will start from flash and relocate itself to RAM
|
|
|
|
*
|
2010-10-07 19:51:12 +00:00
|
|
|
* Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
|
2005-01-09 18:21:42 +00:00
|
|
|
* in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
|
|
|
|
*
|
|
|
|
* ---
|
|
|
|
*/
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
#define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* ---
|
|
|
|
* Configuration for environment
|
|
|
|
* Environment is embedded in u-boot in the second sector of the flash
|
|
|
|
* ---
|
|
|
|
*/
|
|
|
|
|
2015-03-29 20:54:16 +00:00
|
|
|
#define LDS_BOARD_TEXT \
|
2017-08-03 18:21:49 +00:00
|
|
|
. = DEFINED(env_offset) ? env_offset : .; \
|
|
|
|
env/embedded.o(.text);
|
2007-07-05 03:31:56 +00:00
|
|
|
|
2007-07-10 14:29:01 +00:00
|
|
|
/*
|
|
|
|
* BOOTP options
|
|
|
|
*/
|
|
|
|
#define CONFIG_BOOTP_BOOTFILESIZE
|
|
|
|
|
2007-08-16 00:41:06 +00:00
|
|
|
#ifdef CONFIG_MCFFEC
|
2008-03-30 06:22:13 +00:00
|
|
|
# define CONFIG_MII_INIT 1
|
2008-10-16 13:01:15 +00:00
|
|
|
# define CONFIG_SYS_DISCOVER_PHY
|
|
|
|
# define CONFIG_SYS_RX_ETH_BUFFER 8
|
|
|
|
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
|
|
|
|
/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
|
|
|
|
# ifndef CONFIG_SYS_DISCOVER_PHY
|
2007-08-16 00:41:06 +00:00
|
|
|
# define FECDUPLEX FULL
|
|
|
|
# define FECSPEED _100BASET
|
|
|
|
# else
|
2008-10-16 13:01:15 +00:00
|
|
|
# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
|
|
|
|
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
|
2007-08-16 00:41:06 +00:00
|
|
|
# endif
|
2008-10-16 13:01:15 +00:00
|
|
|
# endif /* CONFIG_SYS_DISCOVER_PHY */
|
2007-08-16 00:41:06 +00:00
|
|
|
#endif
|
2005-01-09 18:21:42 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
*-----------------------------------------------------------------------------
|
|
|
|
* Define user parameters that have to be customized most likely
|
|
|
|
*-----------------------------------------------------------------------------
|
|
|
|
*/
|
|
|
|
|
|
|
|
/*AUTOBOOT settings - booting images automatically by u-boot after power on*/
|
|
|
|
|
|
|
|
/* The following settings will be contained in the environment block ; if you
|
|
|
|
want to use a neutral environment all those settings can be manually set in
|
|
|
|
u-boot: 'set' command */
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
|
|
|
|
#define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please
|
|
|
|
enter a valid image address in flash */
|
|
|
|
|
|
|
|
/* User network settings */
|
|
|
|
|
|
|
|
#define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
|
|
|
|
#define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_LOAD_ADDR 0x20000 /*Defines default RAM address
|
2005-01-09 18:21:42 +00:00
|
|
|
from which user programs will be started */
|
|
|
|
|
|
|
|
/*---*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
*-----------------------------------------------------------------------------
|
|
|
|
* End of user parameters to be customized
|
|
|
|
*-----------------------------------------------------------------------------
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* ---
|
|
|
|
* Defines memory range for test
|
|
|
|
* ---
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* ---
|
|
|
|
* Low Level Configuration Settings
|
|
|
|
* (address mappings, register initial values, etc.)
|
|
|
|
* You should know what you are doing if you make changes here.
|
|
|
|
* ---
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* ---
|
|
|
|
* Base register address
|
|
|
|
* ---
|
|
|
|
*/
|
|
|
|
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
|
2005-01-09 18:21:42 +00:00
|
|
|
|
|
|
|
/* ---
|
|
|
|
* System Conf. Reg. & System Protection Reg.
|
|
|
|
* ---
|
|
|
|
*/
|
|
|
|
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_SCR 0x0003
|
|
|
|
#define CONFIG_SYS_SPR 0xffff
|
2005-01-09 18:21:42 +00:00
|
|
|
|
|
|
|
/* ---
|
|
|
|
* Ethernet settings
|
|
|
|
* ---
|
|
|
|
*/
|
|
|
|
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_DISCOVER_PHY
|
|
|
|
#define CONFIG_SYS_ENET_BD_BASE 0x780000
|
2005-01-09 18:21:42 +00:00
|
|
|
|
|
|
|
/*-----------------------------------------------------------------------
|
|
|
|
* Definitions for initial stack pointer and data area (in internal SRAM)
|
|
|
|
*/
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
|
2010-10-26 11:32:32 +00:00
|
|
|
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
|
2010-10-26 12:34:52 +00:00
|
|
|
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
|
2005-01-09 18:21:42 +00:00
|
|
|
|
|
|
|
/*-----------------------------------------------------------------------
|
|
|
|
* Start addresses for the final memory configuration
|
|
|
|
* (Set up by the startup code)
|
2008-10-16 13:01:15 +00:00
|
|
|
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
|
2005-01-09 18:21:42 +00:00
|
|
|
*/
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_SDRAM_BASE 0x00000000
|
2005-01-09 18:21:42 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
*-------------------------------------------------------------------------
|
|
|
|
* RAM SIZE (is defined above)
|
|
|
|
*-----------------------------------------------------------------------
|
|
|
|
*/
|
|
|
|
|
2008-10-16 13:01:15 +00:00
|
|
|
/* #define CONFIG_SYS_SDRAM_SIZE 16 */
|
2005-01-09 18:21:42 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
*-----------------------------------------------------------------------
|
|
|
|
*/
|
|
|
|
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_FLASH_BASE 0xffe00000
|
2005-01-09 18:21:42 +00:00
|
|
|
|
|
|
|
#ifdef CONFIG_MONITOR_IS_IN_RAM
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_MONITOR_BASE 0x20000
|
2005-01-09 18:21:42 +00:00
|
|
|
#else
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
|
2005-01-09 18:21:42 +00:00
|
|
|
#endif
|
|
|
|
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_MONITOR_LEN 0x20000
|
|
|
|
#define CONFIG_SYS_MALLOC_LEN (256 << 10)
|
|
|
|
#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
|
2005-01-09 18:21:42 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* For booting Linux, the board info and command line data
|
|
|
|
* have to be in the first 8 MB of memory, since this is
|
|
|
|
* the maximum mapped by the Linux kernel during initialization ??
|
|
|
|
*/
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
|
2005-01-09 18:21:42 +00:00
|
|
|
|
|
|
|
/*-----------------------------------------------------------------------
|
|
|
|
* FLASH organization
|
|
|
|
*/
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
|
|
|
#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
|
|
|
|
#define CONFIG_SYS_FLASH_ERASE_TOUT 1000 /* flash timeout */
|
2005-01-09 18:21:42 +00:00
|
|
|
|
|
|
|
/*-----------------------------------------------------------------------
|
|
|
|
* Cache Configuration
|
|
|
|
*/
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_CACHELINE_SIZE 16
|
2005-01-09 18:21:42 +00:00
|
|
|
|
2010-03-12 04:12:53 +00:00
|
|
|
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
|
2010-10-26 11:32:32 +00:00
|
|
|
CONFIG_SYS_INIT_RAM_SIZE - 8)
|
2010-03-12 04:12:53 +00:00
|
|
|
#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
|
2010-10-26 11:32:32 +00:00
|
|
|
CONFIG_SYS_INIT_RAM_SIZE - 4)
|
2010-03-12 04:12:53 +00:00
|
|
|
#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
|
|
|
|
#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
|
|
|
|
CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
|
|
|
|
CF_ACR_EN | CF_ACR_SM_ALL)
|
|
|
|
#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
|
|
|
|
CF_CACR_DISD | CF_CACR_INVI | \
|
|
|
|
CF_CACR_CEIB | CF_CACR_DCM | \
|
|
|
|
CF_CACR_EUSP)
|
|
|
|
|
2005-01-09 18:21:42 +00:00
|
|
|
/*-----------------------------------------------------------------------
|
|
|
|
* Memory bank definitions
|
|
|
|
*
|
|
|
|
* Please refer also to Motorola Coldfire user manual - Chapter XXX
|
|
|
|
* <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
|
|
|
|
*/
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_BR0_PRELIM 0xFFE00201
|
|
|
|
#define CONFIG_SYS_OR0_PRELIM 0xFFE00014
|
2005-01-09 18:21:42 +00:00
|
|
|
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_BR1_PRELIM 0
|
|
|
|
#define CONFIG_SYS_OR1_PRELIM 0
|
2005-01-09 18:21:42 +00:00
|
|
|
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_BR2_PRELIM 0
|
|
|
|
#define CONFIG_SYS_OR2_PRELIM 0
|
2005-01-09 18:21:42 +00:00
|
|
|
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_BR3_PRELIM 0
|
|
|
|
#define CONFIG_SYS_OR3_PRELIM 0
|
2005-01-09 18:21:42 +00:00
|
|
|
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_BR4_PRELIM 0
|
|
|
|
#define CONFIG_SYS_OR4_PRELIM 0
|
2005-01-09 18:21:42 +00:00
|
|
|
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_BR5_PRELIM 0
|
|
|
|
#define CONFIG_SYS_OR5_PRELIM 0
|
2005-01-09 18:21:42 +00:00
|
|
|
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_BR6_PRELIM 0
|
|
|
|
#define CONFIG_SYS_OR6_PRELIM 0
|
2005-01-09 18:21:42 +00:00
|
|
|
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_BR7_PRELIM 0x00000701
|
|
|
|
#define CONFIG_SYS_OR7_PRELIM 0xFF00007C
|
2005-01-09 18:21:42 +00:00
|
|
|
|
|
|
|
/*-----------------------------------------------------------------------
|
|
|
|
* LED config
|
|
|
|
*/
|
|
|
|
#define LED_STAT_0 0xffff /*all LEDs off*/
|
|
|
|
#define LED_STAT_1 0xfffe
|
|
|
|
#define LED_STAT_2 0xfffd
|
|
|
|
#define LED_STAT_3 0xfffb
|
|
|
|
#define LED_STAT_4 0xfff7
|
|
|
|
#define LED_STAT_5 0xffef
|
|
|
|
#define LED_STAT_6 0xffdf
|
|
|
|
#define LED_STAT_7 0xff00 /*all LEDs on*/
|
|
|
|
|
|
|
|
/*-----------------------------------------------------------------------
|
|
|
|
* Port configuration (GPIO)
|
|
|
|
*/
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external
|
2005-01-09 18:21:42 +00:00
|
|
|
GPIO*/
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs
|
2005-01-09 18:21:42 +00:00
|
|
|
(1^=output, 0^=input) */
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */
|
|
|
|
#define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART
|
2005-01-09 18:21:42 +00:00
|
|
|
configuration */
|
2008-10-16 13:01:15 +00:00
|
|
|
#define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */
|
|
|
|
#define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */
|
|
|
|
#define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */
|
2005-01-09 18:21:42 +00:00
|
|
|
|
|
|
|
#endif /* _CONFIG_COBRA5272_H */
|