2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2014-04-23 04:53:58 +00:00
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/*
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* Copyright (C) 2014 Gateworks Corporation
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* Tim Harvey <tharvey@gateworks.com>
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*/
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#ifndef __LTC3676_PMIC_H_
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#define __LTC3676_PMIC_H_
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/* LTC3676 registers */
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enum {
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LTC3676_BUCK1 = 0x01,
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LTC3676_BUCK2 = 0x02,
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LTC3676_BUCK3 = 0x03,
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LTC3676_BUCK4 = 0x04,
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LTC3676_LDOA = 0x05,
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LTC3676_LDOB = 0x06,
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LTC3676_SQD1 = 0x07,
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LTC3676_SQD2 = 0x08,
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LTC3676_CNTRL = 0x09,
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LTC3676_DVB1A = 0x0A,
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LTC3676_DVB1B = 0x0B,
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LTC3676_DVB2A = 0x0C,
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LTC3676_DVB2B = 0x0D,
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LTC3676_DVB3A = 0x0E,
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LTC3676_DVB3B = 0x0F,
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LTC3676_DVB4A = 0x10,
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LTC3676_DVB4B = 0x11,
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LTC3676_MSKIRQ = 0x12,
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LTC3676_MSKPG = 0x13,
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LTC3676_USER = 0x14,
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LTC3676_HRST = 0x1E,
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LTC3676_CLIRQ = 0x1F,
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LTC3676_IRQSTAT = 0x15,
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LTC3676_PGSTATL = 0x16,
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LTC3676_PGSTATR = 0x17,
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LTC3676_NUM_OF_REGS = 0x20,
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};
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/*
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* SW Configuration
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*/
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#define LTC3676_DVB_MASK 0x1f
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#define LTC3676_PGOOD_MASK (1<<5)
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#define LTC3676_REF_SELA (0<<5)
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#define LTC3676_REF_SELB (1<<5)
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int power_ltc3676_init(unsigned char bus);
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#endif
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