2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2015-05-13 11:38:32 +00:00
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/*
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* Copyright (C) 2015 Samsung Electronics
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* Przemyslaw Marczak <p.marczak@samsung.com>
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*/
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#ifndef _SANDBOX_PMIC_H_
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#define _SANDBOX_PMIC_H_
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#define SANDBOX_LDO_DRIVER "sandbox_ldo"
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#define SANDBOX_OF_LDO_PREFIX "ldo"
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#define SANDBOX_BUCK_DRIVER "sandbox_buck"
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#define SANDBOX_OF_BUCK_PREFIX "buck"
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2017-11-27 08:14:16 +00:00
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#define SANDBOX_BUCK_COUNT 3
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2015-05-13 11:38:32 +00:00
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#define SANDBOX_LDO_COUNT 2
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/*
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* Sandbox PMIC registers:
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* We have only 12 significant registers, but we alloc 16 for padding.
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*/
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enum {
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SANDBOX_PMIC_REG_BUCK1_UV = 0,
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SANDBOX_PMIC_REG_BUCK1_UA,
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SANDBOX_PMIC_REG_BUCK1_OM,
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SANDBOX_PMIC_REG_BUCK2_UV,
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SANDBOX_PMIC_REG_BUCK2_UA,
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SANDBOX_PMIC_REG_BUCK2_OM,
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SANDBOX_PMIC_REG_LDO_OFFSET,
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SANDBOX_PMIC_REG_LDO1_UV = SANDBOX_PMIC_REG_LDO_OFFSET,
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SANDBOX_PMIC_REG_LDO1_UA,
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SANDBOX_PMIC_REG_LDO1_OM,
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SANDBOX_PMIC_REG_LDO2_UV,
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SANDBOX_PMIC_REG_LDO2_UA,
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SANDBOX_PMIC_REG_LDO2_OM,
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SANDBOX_PMIC_REG_COUNT = 16,
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};
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/* Register offset for output: micro Volts, micro Amps, Operation Mode */
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enum {
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OUT_REG_UV = 0,
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OUT_REG_UA,
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OUT_REG_OM,
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OUT_REG_COUNT,
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};
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/* Buck operation modes */
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enum {
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BUCK_OM_OFF = 0,
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BUCK_OM_ON,
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BUCK_OM_PWM,
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BUCK_OM_COUNT,
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};
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/* Ldo operation modes */
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enum {
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LDO_OM_OFF = 0,
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LDO_OM_ON,
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LDO_OM_SLEEP,
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LDO_OM_STANDBY,
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LDO_OM_COUNT,
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};
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/* BUCK1 Voltage: min: 0.8V, step: 25mV, max 2.4V */
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#define OUT_BUCK1_UV_MIN 800000
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#define OUT_BUCK1_UV_MAX 2400000
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#define OUT_BUCK1_UV_STEP 25000
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/* BUCK1 Amperage: min: 150mA, step: 25mA, max: 250mA */
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#define OUT_BUCK1_UA_MIN 150000
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#define OUT_BUCK1_UA_MAX 250000
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#define OUT_BUCK1_UA_STEP 25000
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/* BUCK2 Voltage: min: 0.75V, step: 50mV, max 3.95V */
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#define OUT_BUCK2_UV_MIN 750000
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#define OUT_BUCK2_UV_MAX 3950000
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#define OUT_BUCK2_UV_STEP 50000
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/* LDO1 Voltage: min: 0.8V, step: 25mV, max 2.4V */
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#define OUT_LDO1_UV_MIN 800000
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#define OUT_LDO1_UV_MAX 2400000
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#define OUT_LDO1_UV_STEP 25000
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/* LDO1 Amperage: min: 100mA, step: 50mA, max: 200mA */
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#define OUT_LDO1_UA_MIN 100000
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#define OUT_LDO1_UA_MAX 200000
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#define OUT_LDO1_UA_STEP 50000
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/* LDO2 Voltage: min: 0.75V, step: 50mV, max 3.95V */
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#define OUT_LDO2_UV_MIN 750000
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#define OUT_LDO2_UV_MAX 3950000
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#define OUT_LDO2_UV_STEP 50000
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/* register <-> value conversion */
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#define REG2VAL(min, step, reg) ((min) + ((step) * (reg)))
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#define VAL2REG(min, step, val) (((val) - (min)) / (step))
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/* Operation mode id -> register value conversion */
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#define OM2REG(x) (x)
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2015-05-13 11:38:33 +00:00
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/* Test data for: test/dm/power.c */
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/* BUCK names */
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#define SANDBOX_BUCK1_DEVNAME "buck1"
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#define SANDBOX_BUCK1_PLATNAME "SUPPLY_1.2V"
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#define SANDBOX_BUCK2_DEVNAME "buck2"
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#define SANDBOX_BUCK2_PLATNAME "SUPPLY_3.3V"
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2017-11-27 08:14:16 +00:00
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/* BUCK3: for testing fallback regulator prefix matching during bind */
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#define SANDBOX_BUCK3_DEVNAME "no_match_by_nodename"
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#define SANDBOX_BUCK3_PLATNAME "buck_SUPPLY_1.5V"
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2015-05-13 11:38:33 +00:00
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/* LDO names */
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#define SANDBOX_LDO1_DEVNAME "ldo1"
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#define SANDBOX_LDO1_PLATNAME "VDD_EMMC_1.8V"
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#define SANDBOX_LDO2_DEVNAME "ldo2"
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#define SANDBOX_LDO2_PLATNAME "VDD_LCD_3.3V"
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/*
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* Expected regulators setup after call of:
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2015-06-23 21:38:58 +00:00
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* - regulator_autoset_by_name()
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2015-05-13 11:38:33 +00:00
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* - regulator_list_autoset()
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*/
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2015-06-23 21:38:58 +00:00
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/* BUCK1: for testing regulator_autoset_by_name() */
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2015-05-13 11:38:33 +00:00
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#define SANDBOX_BUCK1_AUTOSET_EXPECTED_UV 1200000
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#define SANDBOX_BUCK1_AUTOSET_EXPECTED_UA 200000
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#define SANDBOX_BUCK1_AUTOSET_EXPECTED_ENABLE true
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2015-10-27 12:08:07 +00:00
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/* BUCK2: for testing sandbox ADC's supply */
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#define SANDBOX_BUCK2_INITIAL_EXPECTED_UV 3000000
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#define SANDBOX_BUCK2_SET_UV 3300000
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2015-05-13 11:38:33 +00:00
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/* LDO1/2 for testing regulator_list_autoset() */
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#define SANDBOX_LDO1_AUTOSET_EXPECTED_UV 1800000
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#define SANDBOX_LDO1_AUTOSET_EXPECTED_UA 100000
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#define SANDBOX_LDO1_AUTOSET_EXPECTED_ENABLE true
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#define SANDBOX_LDO2_AUTOSET_EXPECTED_UV 3000000
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#define SANDBOX_LDO2_AUTOSET_EXPECTED_UA -ENOSYS
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#define SANDBOX_LDO2_AUTOSET_EXPECTED_ENABLE false
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2015-05-13 11:38:32 +00:00
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#endif
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