mirror of
https://github.com/AsahiLinux/u-boot
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87 lines
2.1 KiB
C
87 lines
2.1 KiB
C
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2022 Nuvoton Technology Corp.
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*/
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#include <common.h>
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#include <dm.h>
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#include <sdhci.h>
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#include <clk.h>
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#include <power/regulator.h>
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#define NPCM_SDHC_MIN_FREQ 400000
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struct npcm_sdhci_plat {
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struct mmc_config cfg;
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struct mmc mmc;
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};
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static int npcm_sdhci_probe(struct udevice *dev)
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{
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struct npcm_sdhci_plat *plat = dev_get_plat(dev);
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
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struct sdhci_host *host = dev_get_priv(dev);
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struct udevice *vqmmc_supply;
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int vqmmc_uv, ret;
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struct clk clk;
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host->name = dev->name;
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host->ioaddr = dev_read_addr_ptr(dev);
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host->max_clk = dev_read_u32_default(dev, "clock-frequency", 0);
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ret = clk_get_by_index(dev, 0, &clk);
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if (!ret && host->max_clk) {
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ret = clk_set_rate(&clk, host->max_clk);
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if (ret < 0)
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return ret;
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}
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if (IS_ENABLED(CONFIG_DM_REGULATOR)) {
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device_get_supply_regulator(dev, "vqmmc-supply", &vqmmc_supply);
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vqmmc_uv = dev_read_u32_default(dev, "vqmmc-microvolt", 0);
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/* Set IO voltage */
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if (vqmmc_supply && vqmmc_uv)
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regulator_set_value(vqmmc_supply, vqmmc_uv);
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}
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host->index = dev_read_u32_default(dev, "index", 0);
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ret = mmc_of_parse(dev, &plat->cfg);
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if (ret)
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return ret;
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host->mmc = &plat->mmc;
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host->mmc->priv = host;
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host->mmc->dev = dev;
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upriv->mmc = host->mmc;
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ret = sdhci_setup_cfg(&plat->cfg, host, 0, NPCM_SDHC_MIN_FREQ);
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if (ret)
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return ret;
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return sdhci_probe(dev);
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}
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static int npcm_sdhci_bind(struct udevice *dev)
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{
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struct npcm_sdhci_plat *plat = dev_get_plat(dev);
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return sdhci_bind(dev, &plat->mmc, &plat->cfg);
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}
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static const struct udevice_id npcm_mmc_ids[] = {
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{ .compatible = "nuvoton,npcm750-sdhci" },
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{ .compatible = "nuvoton,npcm845-sdhci" },
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{ }
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};
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U_BOOT_DRIVER(npcm_sdhci_drv) = {
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.name = "npcm_sdhci",
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.id = UCLASS_MMC,
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.of_match = npcm_mmc_ids,
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.ops = &sdhci_ops,
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.bind = npcm_sdhci_bind,
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.probe = npcm_sdhci_probe,
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.priv_auto = sizeof(struct sdhci_host),
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.plat_auto = sizeof(struct npcm_sdhci_plat),
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};
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