u-boot/arch/arm/dts/avnet-ultra96-rev1.dts

// SPDX-License-Identifier: GPL-2.0+
/*
 * dts file for Avnet Ultra96 rev1
 *
 * (C) Copyright 2018 - 2020, Xilinx, Inc.
 *
 * Michal Simek <michal.simek@amd.com>
 */

/dts-v1/;

#include "zynqmp-zcu100-revC.dts"

/ {
	model = "Avnet Ultra96 Rev1";
	compatible = "avnet,ultra96-rev1", "avnet,ultra96",
		     "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100",
		     "xlnx,zynqmp";
};
arm64: zynqmp: Add support for Avnet Ultra96 Avnet Ultra96 is rebranded Xilinx zcu100 revC/D. Add new defconfig files and point to origin internal board name. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2018-07-24 14:27:00 +00:00			`// SPDX-License-Identifier: GPL-2.0+`
			`/*`
			`* dts file for Avnet Ultra96 rev1`
			`*`
arm64: zynqmp: Update Copyright years to 2020 Trivial change. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2020-02-18 07:38:06 +00:00			`* (C) Copyright 2018 - 2020, Xilinx, Inc.`
arm64: zynqmp: Add support for Avnet Ultra96 Avnet Ultra96 is rebranded Xilinx zcu100 revC/D. Add new defconfig files and point to origin internal board name. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2018-07-24 14:27:00 +00:00			`*`
arm64: zynqmp: Switch to amd.com emails Update my and DPs email address to match current setup. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/aba5b19b9c5a95608829e86ad5cc4671c940f1bb.1688992543.git.michal.simek@amd.com 2023-07-10 12:35:49 +00:00			`* Michal Simek <michal.simek@amd.com>`
arm64: zynqmp: Add support for Avnet Ultra96 Avnet Ultra96 is rebranded Xilinx zcu100 revC/D. Add new defconfig files and point to origin internal board name. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2018-07-24 14:27:00 +00:00			`*/`

			`/dts-v1/;`

			`#include "zynqmp-zcu100-revC.dts"`

			`/ {`
			`model = "Avnet Ultra96 Rev1";`
			`compatible = "avnet,ultra96-rev1", "avnet,ultra96",`
			`"xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100",`
			`"xlnx,zynqmp";`
			`};`