2018-08-16 15:30:11 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2018 Exceet Electronics GmbH
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* Copyright (C) 2018 Bootlin
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*
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* Author:
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* Peter Pan <peterpandong@micron.com>
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* Boris Brezillon <boris.brezillon@bootlin.com>
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*/
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#ifndef __UBOOT_SPI_MEM_H
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#define __UBOOT_SPI_MEM_H
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2020-07-19 16:15:34 +00:00
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struct udevice;
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2018-08-16 15:30:11 +00:00
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#define SPI_MEM_OP_CMD(__opcode, __buswidth) \
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{ \
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.buswidth = __buswidth, \
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.opcode = __opcode, \
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2021-06-25 19:17:04 +00:00
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.nbytes = 1, \
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2018-08-16 15:30:11 +00:00
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}
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#define SPI_MEM_OP_ADDR(__nbytes, __val, __buswidth) \
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{ \
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.nbytes = __nbytes, \
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.val = __val, \
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.buswidth = __buswidth, \
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}
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#define SPI_MEM_OP_NO_ADDR { }
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#define SPI_MEM_OP_DUMMY(__nbytes, __buswidth) \
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{ \
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.nbytes = __nbytes, \
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.buswidth = __buswidth, \
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}
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#define SPI_MEM_OP_NO_DUMMY { }
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#define SPI_MEM_OP_DATA_IN(__nbytes, __buf, __buswidth) \
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{ \
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.dir = SPI_MEM_DATA_IN, \
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.nbytes = __nbytes, \
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.buf.in = __buf, \
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.buswidth = __buswidth, \
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}
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#define SPI_MEM_OP_DATA_OUT(__nbytes, __buf, __buswidth) \
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{ \
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.dir = SPI_MEM_DATA_OUT, \
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.nbytes = __nbytes, \
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.buf.out = __buf, \
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.buswidth = __buswidth, \
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}
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#define SPI_MEM_OP_NO_DATA { }
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/**
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* enum spi_mem_data_dir - describes the direction of a SPI memory data
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* transfer from the controller perspective
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2020-03-20 09:35:31 +00:00
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* @SPI_MEM_NO_DATA: no data transferred
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2018-08-16 15:30:11 +00:00
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* @SPI_MEM_DATA_IN: data coming from the SPI memory
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* @SPI_MEM_DATA_OUT: data sent the SPI memory
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*/
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enum spi_mem_data_dir {
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2020-03-20 09:35:31 +00:00
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SPI_MEM_NO_DATA,
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SPI_MEM_DATA_IN,
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SPI_MEM_DATA_OUT,
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};
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/**
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* struct spi_mem_op - describes a SPI memory operation
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2021-06-25 19:17:04 +00:00
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* @cmd.nbytes: number of opcode bytes (only 1 or 2 are valid). The opcode is
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* sent MSB-first.
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2018-08-16 15:30:11 +00:00
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* @cmd.buswidth: number of IO lines used to transmit the command
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* @cmd.opcode: operation opcode
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* @cmd.dtr: whether the command opcode should be sent in DTR mode or not
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* @addr.nbytes: number of address bytes to send. Can be zero if the operation
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* does not need to send an address
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* @addr.buswidth: number of IO lines used to transmit the address cycles
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* @addr.val: address value. This value is always sent MSB first on the bus.
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* Note that only @addr.nbytes are taken into account in this
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* address value, so users should make sure the value fits in the
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* assigned number of bytes.
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* @addr.dtr: whether the address should be sent in DTR mode or not
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* @dummy.nbytes: number of dummy bytes to send after an opcode or address. Can
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* be zero if the operation does not require dummy bytes
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* @dummy.buswidth: number of IO lanes used to transmit the dummy bytes
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* @dummy.dtr: whether the dummy bytes should be sent in DTR mode or not
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* @data.buswidth: number of IO lanes used to send/receive the data
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* @data.dtr: whether the data should be sent in DTR mode or not
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* @data.dir: direction of the transfer
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* @data.buf.in: input buffer
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* @data.buf.out: output buffer
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*/
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struct spi_mem_op {
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struct {
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u8 nbytes;
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u8 buswidth;
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u8 dtr : 1;
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u16 opcode;
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} cmd;
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struct {
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u8 nbytes;
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u8 buswidth;
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u8 dtr : 1;
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2018-08-16 15:30:11 +00:00
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u64 val;
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} addr;
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struct {
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u8 nbytes;
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u8 buswidth;
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u8 dtr : 1;
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2018-08-16 15:30:11 +00:00
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} dummy;
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struct {
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u8 buswidth;
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u8 dtr : 1;
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enum spi_mem_data_dir dir;
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unsigned int nbytes;
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/* buf.{in,out} must be DMA-able. */
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union {
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void *in;
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const void *out;
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} buf;
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} data;
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};
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#define SPI_MEM_OP(__cmd, __addr, __dummy, __data) \
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{ \
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.cmd = __cmd, \
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.addr = __addr, \
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.dummy = __dummy, \
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.data = __data, \
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}
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#ifndef __UBOOT__
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/**
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* struct spi_mem - describes a SPI memory device
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* @spi: the underlying SPI device
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* @drvpriv: spi_mem_driver private data
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*
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* Extra information that describe the SPI memory device and may be needed by
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* the controller to properly handle this device should be placed here.
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*
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* One example would be the device size since some controller expose their SPI
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* mem devices through a io-mapped region.
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*/
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struct spi_mem {
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struct udevice *dev;
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void *drvpriv;
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};
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/**
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* struct spi_mem_set_drvdata() - attach driver private data to a SPI mem
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* device
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* @mem: memory device
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* @data: data to attach to the memory device
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*/
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static inline void spi_mem_set_drvdata(struct spi_mem *mem, void *data)
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{
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mem->drvpriv = data;
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}
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/**
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* struct spi_mem_get_drvdata() - get driver private data attached to a SPI mem
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* device
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* @mem: memory device
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*
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* Return: the data attached to the mem device.
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*/
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static inline void *spi_mem_get_drvdata(struct spi_mem *mem)
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{
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return mem->drvpriv;
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}
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#endif /* __UBOOT__ */
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/**
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* struct spi_controller_mem_ops - SPI memory operations
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* @adjust_op_size: shrink the data xfer of an operation to match controller's
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* limitations (can be alignment of max RX/TX size
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* limitations)
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* @supports_op: check if an operation is supported by the controller
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* @exec_op: execute a SPI memory operation
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*
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* This interface should be implemented by SPI controllers providing an
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* high-level interface to execute SPI memory operation, which is usually the
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* case for QSPI controllers.
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*/
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struct spi_controller_mem_ops {
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int (*adjust_op_size)(struct spi_slave *slave, struct spi_mem_op *op);
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bool (*supports_op)(struct spi_slave *slave,
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const struct spi_mem_op *op);
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int (*exec_op)(struct spi_slave *slave,
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const struct spi_mem_op *op);
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};
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#ifndef __UBOOT__
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/**
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* struct spi_mem_driver - SPI memory driver
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* @spidrv: inherit from a SPI driver
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* @probe: probe a SPI memory. Usually where detection/initialization takes
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* place
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* @remove: remove a SPI memory
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* @shutdown: take appropriate action when the system is shutdown
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*
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* This is just a thin wrapper around a spi_driver. The core takes care of
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* allocating the spi_mem object and forwarding the probe/remove/shutdown
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* request to the spi_mem_driver. The reason we use this wrapper is because
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* we might have to stuff more information into the spi_mem struct to let
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* SPI controllers know more about the SPI memory they interact with, and
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* having this intermediate layer allows us to do that without adding more
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* useless fields to the spi_device object.
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*/
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struct spi_mem_driver {
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struct spi_driver spidrv;
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int (*probe)(struct spi_mem *mem);
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int (*remove)(struct spi_mem *mem);
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void (*shutdown)(struct spi_mem *mem);
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};
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#if IS_ENABLED(CONFIG_SPI_MEM)
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int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
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const struct spi_mem_op *op,
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struct sg_table *sg);
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void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
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const struct spi_mem_op *op,
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struct sg_table *sg);
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#else
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static inline int
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spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
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const struct spi_mem_op *op,
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struct sg_table *sg)
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{
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2021-03-24 21:26:06 +00:00
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return -ENOSYS;
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2018-08-16 15:30:11 +00:00
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}
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static inline void
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spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
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const struct spi_mem_op *op,
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struct sg_table *sg)
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{
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}
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#endif /* CONFIG_SPI_MEM */
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#endif /* __UBOOT__ */
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int spi_mem_adjust_op_size(struct spi_slave *slave, struct spi_mem_op *op);
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bool spi_mem_supports_op(struct spi_slave *slave, const struct spi_mem_op *op);
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2021-06-25 19:17:06 +00:00
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bool spi_mem_dtr_supports_op(struct spi_slave *slave,
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const struct spi_mem_op *op);
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2018-08-16 15:30:11 +00:00
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2021-06-25 19:17:05 +00:00
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bool spi_mem_default_supports_op(struct spi_slave *slave,
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const struct spi_mem_op *op);
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2018-08-16 15:30:11 +00:00
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int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op);
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2021-01-25 03:55:20 +00:00
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bool spi_mem_default_supports_op(struct spi_slave *mem,
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const struct spi_mem_op *op);
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2018-08-16 15:30:11 +00:00
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#ifndef __UBOOT__
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int spi_mem_driver_register_with_owner(struct spi_mem_driver *drv,
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struct module *owner);
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void spi_mem_driver_unregister(struct spi_mem_driver *drv);
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#define spi_mem_driver_register(__drv) \
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spi_mem_driver_register_with_owner(__drv, THIS_MODULE)
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#define module_spi_mem_driver(__drv) \
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module_driver(__drv, spi_mem_driver_register, \
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spi_mem_driver_unregister)
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#endif
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#endif /* __LINUX_SPI_MEM_H */
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