u-boot/include/configs/zynq_cse.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * (C) Copyright 2013 - 2017 Xilinx.
 *
 * Configuration settings for the Xilinx Zynq CSE board.
 * See zynq-common.h for Zynq common configs
 */

#ifndef __CONFIG_ZYNQ_CSE_H
#define __CONFIG_ZYNQ_CSE_H

#include <configs/zynq-common.h>

/* Undef unneeded configs */
#undef CONFIG_EXTRA_ENV_SETTINGS

#undef CONFIG_SYS_CBSIZE

#define CONFIG_SYS_CBSIZE	1024

#undef CONFIG_SYS_INIT_RAM_ADDR
#undef CONFIG_SYS_INIT_RAM_SIZE
#define CONFIG_SYS_INIT_RAM_ADDR	0xFFFDE000
#define CONFIG_SYS_INIT_RAM_SIZE	0x1000
#undef CONFIG_SPL_BSS_START_ADDR
#undef CONFIG_SPL_BSS_MAX_SIZE
#define CONFIG_SPL_BSS_START_ADDR	0x20000
#define CONFIG_SPL_BSS_MAX_SIZE		0x8000

#endif /* __CONFIG_ZYNQ_CSE_H */
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-06 21:58:06 +00:00			`/* SPDX-License-Identifier: GPL-2.0+ */`
arm: zynq: Add mini u-boot configuration for zynq Add configuration files/dtses for mini u-boot configurations which runs out of OCM. ram top is calculated from 0 that's why +#define CONFIG_SYS_SDRAM_BASE 0xfffc0000 +#define CONFIG_SYS_SDRAM_SIZE 0x40000 was hardcoded. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> 2017-11-02 09:54:48 +00:00			`/*`
			`* (C) Copyright 2013 - 2017 Xilinx.`
			`*`
			`* Configuration settings for the Xilinx Zynq CSE board.`
			`* See zynq-common.h for Zynq common configs`
			`*/`

			`#ifndef __CONFIG_ZYNQ_CSE_H`
			`#define __CONFIG_ZYNQ_CSE_H`

			`#include <configs/zynq-common.h>`

			`/* Undef unneeded configs */`
			`#undef CONFIG_EXTRA_ENV_SETTINGS`

			`#undef CONFIG_SYS_CBSIZE`

			`#define CONFIG_SYS_CBSIZE 1024`

			`#undef CONFIG_SYS_INIT_RAM_ADDR`
			`#undef CONFIG_SYS_INIT_RAM_SIZE`
			`#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFDE000`
			`#define CONFIG_SYS_INIT_RAM_SIZE 0x1000`
			`#undef CONFIG_SPL_BSS_START_ADDR`
			`#undef CONFIG_SPL_BSS_MAX_SIZE`
			`#define CONFIG_SPL_BSS_START_ADDR 0x20000`
			`#define CONFIG_SPL_BSS_MAX_SIZE 0x8000`

			`#endif /* __CONFIG_ZYNQ_CSE_H */`