2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2007-12-27 15:55:17 +00:00
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/*
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* (C) Copyright 2007
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* Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com.
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*/
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/*
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* Epson RX8025 RTC driver.
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*/
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#include <common.h>
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#include <command.h>
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2019-07-16 03:31:35 +00:00
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#include <dm.h>
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2007-12-27 15:55:17 +00:00
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#include <i2c.h>
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2019-07-16 03:31:35 +00:00
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#include <rtc.h>
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2007-12-27 15:55:17 +00:00
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/*---------------------------------------------------------------------*/
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#undef DEBUG_RTC
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#ifdef DEBUG_RTC
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#define DEBUGR(fmt,args...) printf(fmt ,##args)
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#else
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#define DEBUGR(fmt,args...)
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#endif
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/*---------------------------------------------------------------------*/
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2021-09-17 06:46:02 +00:00
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enum rx_model {
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model_rx_8025,
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model_rx_8035,
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};
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2007-12-27 15:55:17 +00:00
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/*
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* RTC register addresses
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*/
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#define RTC_SEC_REG_ADDR 0x00
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#define RTC_MIN_REG_ADDR 0x01
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#define RTC_HR_REG_ADDR 0x02
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#define RTC_DAY_REG_ADDR 0x03
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#define RTC_DATE_REG_ADDR 0x04
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#define RTC_MON_REG_ADDR 0x05
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#define RTC_YR_REG_ADDR 0x06
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2021-09-17 06:46:03 +00:00
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#define RTC_OFFSET_REG_ADDR 0x07
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2007-12-27 15:55:17 +00:00
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#define RTC_CTL1_REG_ADDR 0x0e
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#define RTC_CTL2_REG_ADDR 0x0f
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/*
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* Control register 1 bits
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*/
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#define RTC_CTL1_BIT_2412 0x20
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/*
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* Control register 2 bits
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*/
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#define RTC_CTL2_BIT_PON 0x10
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#define RTC_CTL2_BIT_VDET 0x40
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#define RTC_CTL2_BIT_XST 0x20
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#define RTC_CTL2_BIT_VDSL 0x80
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/*
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* Note: the RX8025 I2C RTC requires register
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* reads and write to consist of a single bus
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* cycle. It is not allowed to write the register
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* address in a first cycle that is terminated by
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* a STOP condition. The chips needs a 'restart'
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* sequence (start sequence without a prior stop).
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*/
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2019-07-16 03:31:35 +00:00
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#define rtc_read(reg) buf[(reg) & 0xf]
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2007-12-27 15:55:17 +00:00
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2021-09-17 06:46:01 +00:00
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static int rtc_write(struct udevice *dev, uchar reg, uchar val);
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2007-12-27 15:55:17 +00:00
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2021-09-17 06:46:02 +00:00
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static int rx8025_is_osc_stopped(enum rx_model model, int ctrl2)
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{
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int xstp = ctrl2 & RTC_CTL2_BIT_XST;
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/* XSTP bit has different polarity on RX-8025 vs RX-8035.
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* RX-8025: 0 == oscillator stopped
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* RX-8035: 1 == oscillator stopped
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*/
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if (model == model_rx_8025)
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xstp = !xstp;
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return xstp;
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}
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2007-12-27 15:55:17 +00:00
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/*
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* Get the current time from the RTC
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*/
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2021-09-17 06:46:01 +00:00
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static int rx8025_rtc_get(struct udevice *dev, struct rtc_time *tmp)
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2007-12-27 15:55:17 +00:00
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{
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2008-03-20 14:56:04 +00:00
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int rel = 0;
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2007-12-27 15:55:17 +00:00
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uchar sec, min, hour, mday, wday, mon, year, ctl2;
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uchar buf[16];
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2019-07-16 03:31:35 +00:00
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if (dm_i2c_read(dev, 0, buf, sizeof(buf))) {
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2007-12-27 15:55:17 +00:00
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printf("Error reading from RTC\n");
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2019-07-16 03:31:35 +00:00
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return -EIO;
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}
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2007-12-27 15:55:17 +00:00
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sec = rtc_read(RTC_SEC_REG_ADDR);
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min = rtc_read(RTC_MIN_REG_ADDR);
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hour = rtc_read(RTC_HR_REG_ADDR);
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wday = rtc_read(RTC_DAY_REG_ADDR);
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mday = rtc_read(RTC_DATE_REG_ADDR);
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mon = rtc_read(RTC_MON_REG_ADDR);
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year = rtc_read(RTC_YR_REG_ADDR);
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2019-07-16 03:31:34 +00:00
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DEBUGR("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
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"hr: %02x min: %02x sec: %02x\n",
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year, mon, mday, wday, hour, min, sec);
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2007-12-27 15:55:17 +00:00
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/* dump status */
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ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
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2008-03-20 14:56:04 +00:00
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if (ctl2 & RTC_CTL2_BIT_PON) {
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2007-12-27 15:55:17 +00:00
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printf("RTC: power-on detected\n");
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2008-03-20 14:56:04 +00:00
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rel = -1;
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}
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2007-12-27 15:55:17 +00:00
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2008-03-20 14:56:04 +00:00
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if (ctl2 & RTC_CTL2_BIT_VDET) {
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2007-12-27 15:55:17 +00:00
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printf("RTC: voltage drop detected\n");
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2008-03-20 14:56:04 +00:00
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rel = -1;
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}
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2021-09-17 06:46:02 +00:00
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if (rx8025_is_osc_stopped(dev->driver_data, ctl2)) {
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2007-12-27 15:55:17 +00:00
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printf("RTC: oscillator stop detected\n");
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2008-03-20 14:56:04 +00:00
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rel = -1;
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}
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2007-12-27 15:55:17 +00:00
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2019-07-16 03:31:34 +00:00
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tmp->tm_sec = bcd2bin(sec & 0x7F);
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tmp->tm_min = bcd2bin(min & 0x7F);
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2008-08-15 13:42:09 +00:00
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if (rtc_read(RTC_CTL1_REG_ADDR) & RTC_CTL1_BIT_2412)
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2019-07-16 03:31:34 +00:00
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tmp->tm_hour = bcd2bin(hour & 0x3F);
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2008-08-15 13:42:09 +00:00
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else
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2019-07-16 03:31:34 +00:00
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tmp->tm_hour = bcd2bin(hour & 0x1F) % 12 +
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2008-08-15 13:42:09 +00:00
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((hour & 0x20) ? 12 : 0);
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2019-07-16 03:31:34 +00:00
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2007-12-27 15:55:17 +00:00
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tmp->tm_mday = bcd2bin (mday & 0x3F);
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tmp->tm_mon = bcd2bin (mon & 0x1F);
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tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
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tmp->tm_wday = bcd2bin (wday & 0x07);
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tmp->tm_yday = 0;
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tmp->tm_isdst= 0;
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2019-07-16 03:31:34 +00:00
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DEBUGR("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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2008-03-20 14:56:04 +00:00
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return rel;
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2007-12-27 15:55:17 +00:00
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}
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/*
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* Set the RTC
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*/
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2021-09-17 06:46:01 +00:00
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static int rx8025_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
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2007-12-27 15:55:17 +00:00
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{
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2021-09-17 06:46:03 +00:00
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/* To work around the read/write cycle issue mentioned
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* at the top of this file, write all the time registers
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* in one I2C transaction
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*/
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u8 write_op[8];
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/* 2412 flag must be set before doing a RTC write,
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* otherwise the seconds and minute register
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* will be cleared when the flag is set
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*/
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if (rtc_write(dev, RTC_CTL1_REG_ADDR, RTC_CTL1_BIT_2412))
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return -EIO;
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2019-07-16 03:31:34 +00:00
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DEBUGR("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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2007-12-27 15:55:17 +00:00
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if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
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printf("WARNING: year should be between 1970 and 2069!\n");
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2021-09-17 06:46:03 +00:00
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write_op[RTC_SEC_REG_ADDR] = bin2bcd(tmp->tm_sec);
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write_op[RTC_MIN_REG_ADDR] = bin2bcd(tmp->tm_min);
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write_op[RTC_HR_REG_ADDR] = bin2bcd(tmp->tm_hour);
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write_op[RTC_DAY_REG_ADDR] = bin2bcd(tmp->tm_wday);
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write_op[RTC_DATE_REG_ADDR] = bin2bcd(tmp->tm_mday);
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write_op[RTC_MON_REG_ADDR] = bin2bcd(tmp->tm_mon);
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write_op[RTC_YR_REG_ADDR] = bin2bcd(tmp->tm_year % 100);
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write_op[RTC_OFFSET_REG_ADDR] = 0;
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2019-07-16 03:31:35 +00:00
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2021-09-17 06:46:03 +00:00
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return dm_i2c_write(dev, 0, &write_op[0], 8);
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2007-12-27 15:55:17 +00:00
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}
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/*
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2018-03-21 02:40:37 +00:00
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* Reset the RTC
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2007-12-27 15:55:17 +00:00
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*/
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2021-09-17 06:46:01 +00:00
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static int rx8025_rtc_reset(struct udevice *dev)
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2007-12-27 15:55:17 +00:00
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{
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uchar buf[16];
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uchar ctl2;
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2019-07-16 03:31:35 +00:00
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if (dm_i2c_read(dev, 0, buf, sizeof(buf))) {
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2007-12-27 15:55:17 +00:00
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printf("Error reading from RTC\n");
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2019-07-16 03:31:35 +00:00
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return -EIO;
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}
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2007-12-27 15:55:17 +00:00
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ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
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ctl2 &= ~(RTC_CTL2_BIT_PON | RTC_CTL2_BIT_VDET);
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2021-09-17 06:46:02 +00:00
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if (dev->driver_data == model_rx_8035)
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ctl2 &= ~(RTC_CTL2_BIT_XST);
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else
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ctl2 |= RTC_CTL2_BIT_XST;
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2019-07-16 03:31:35 +00:00
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return rtc_write(dev, RTC_CTL2_REG_ADDR, ctl2);
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2007-12-27 15:55:17 +00:00
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}
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/*
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* Helper functions
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*/
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2021-09-17 06:46:01 +00:00
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static int rtc_write(struct udevice *dev, uchar reg, uchar val)
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2007-12-27 15:55:17 +00:00
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{
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uchar buf[2];
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buf[0] = reg << 4;
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buf[1] = val;
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2019-07-16 03:31:35 +00:00
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if (dm_i2c_write(dev, 0, buf, 2)) {
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2007-12-27 15:55:17 +00:00
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printf("Error writing to RTC\n");
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2019-07-16 03:31:35 +00:00
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return -EIO;
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}
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return 0;
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}
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static int rx8025_probe(struct udevice *dev)
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{
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uchar buf[16];
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int ret = 0;
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if (i2c_get_chip_offset_len(dev) != 1)
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ret = i2c_set_chip_offset_len(dev, 1);
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if (ret)
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return ret;
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return dm_i2c_read(dev, 0, buf, sizeof(buf));
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}
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static const struct rtc_ops rx8025_rtc_ops = {
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.get = rx8025_rtc_get,
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.set = rx8025_rtc_set,
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.reset = rx8025_rtc_reset,
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};
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static const struct udevice_id rx8025_rtc_ids[] = {
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2021-09-17 06:46:02 +00:00
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{ .compatible = "epson,rx8025", .data = model_rx_8025 },
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{ .compatible = "epson,rx8035", .data = model_rx_8035 },
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2019-07-16 03:31:35 +00:00
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{ }
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};
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2021-09-17 06:46:02 +00:00
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U_BOOT_DRIVER(rx8025_rtc) = {
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2019-07-16 03:31:35 +00:00
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.name = "rx8025_rtc",
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.id = UCLASS_RTC,
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.probe = rx8025_probe,
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.of_match = rx8025_rtc_ids,
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.ops = &rx8025_rtc_ops,
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};
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