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u-boot/arch/arm/cpu/armv8/fsl-lsch3/README

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ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC Freescale LayerScape with Chassis Generation 3 is a set of SoCs with ARMv8 cores and 3rd generation of Chassis. We use different MMU setup to support memory map and cache attribute for these SoCs. MMU and cache are enabled very early to bootst performance, especially for early development on emulators. After u-boot relocates to DDR, a new MMU table with QBMan cache access is created in DDR. SMMU pagesize is set in SMMU_sACR register. Both DDR3 and DDR4 are supported. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
2014-06-23 22:15:54 +00:00
#
# Copyright 2014 Freescale Semiconductor
#
# SPDX-License-Identifier: GPL-2.0+
#
Freescale LayerScape with Chassis Generation 3
This architecture supports Freescale ARMv8 SoCs with Chassis generation 3,
ARMv8/ls2085a_emu: Add LS2085A emulator and simulator board support LS2085A is an ARMv8 implementation. This adds board support for emulator and simulator: Two DDR controllers UART2 is used as the console IFC timing is tightened for speedy booting Support DDR3 and DDR4 as separated targets Management Complex (MC) is enabled Support for GIC 500 (based on GICv3 arch) Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Arnab Basu <arnab.basu@freescale.com> Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2014-06-23 22:15:56 +00:00
for example LS2085A.
fsl-ch3/README: Add description for NOR flash layout (firmware images) This patch adds description for NOR flash layout (firmware images) in the README file for LS2085A platforms. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-03-19 16:20:44 +00:00
Flash Layout
============
armv8/ls2085aqds: Add support of LS2085AQDS platform The LS2085AQDS is an evaluatoin platform that supports the LS2085A family SoCs. This patch add basic support of the platform. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2015-03-21 02:28:23 +00:00
(1) A typical layout of various images (including Linux and other firmware images)
is shown below considering a 32MB NOR flash device present on most
pre-silicon platforms (simulator and emulator):
fsl-ch3/README: Add description for NOR flash layout (firmware images) This patch adds description for NOR flash layout (firmware images) in the README file for LS2085A platforms. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-03-19 16:20:44 +00:00
-------------------------
armv8/ls2085aqds: Add support of LS2085AQDS platform The LS2085AQDS is an evaluatoin platform that supports the LS2085A family SoCs. This patch add basic support of the platform. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2015-03-21 02:28:23 +00:00
| FIT Image |
| (linux + DTB + RFS) |
fsl-ch3/README: Add description for NOR flash layout (firmware images) This patch adds description for NOR flash layout (firmware images) in the README file for LS2085A platforms. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-03-19 16:20:44 +00:00
------------------------- ----> 0x0120_0000
armv8/ls2085aqds: Add support of LS2085AQDS platform The LS2085AQDS is an evaluatoin platform that supports the LS2085A family SoCs. This patch add basic support of the platform. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2015-03-21 02:28:23 +00:00
| Debug Server FW |
fsl-ch3/README: Add description for NOR flash layout (firmware images) This patch adds description for NOR flash layout (firmware images) in the README file for LS2085A platforms. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-03-19 16:20:44 +00:00
------------------------- ----> 0x00C0_0000
armv8/ls2085aqds: Add support of LS2085AQDS platform The LS2085AQDS is an evaluatoin platform that supports the LS2085A family SoCs. This patch add basic support of the platform. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2015-03-21 02:28:23 +00:00
| AIOP FW |
fsl-ch3/README: Add description for NOR flash layout (firmware images) This patch adds description for NOR flash layout (firmware images) in the README file for LS2085A platforms. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-03-19 16:20:44 +00:00
------------------------- ----> 0x0070_0000
| MC FW |
------------------------- ----> 0x006C_0000
armv8/ls2085aqds: Add support of LS2085AQDS platform The LS2085AQDS is an evaluatoin platform that supports the LS2085A family SoCs. This patch add basic support of the platform. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2015-03-21 02:28:23 +00:00
| MC DPL Blob |
fsl-ch3/README: Add description for NOR flash layout (firmware images) This patch adds description for NOR flash layout (firmware images) in the README file for LS2085A platforms. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-03-19 16:20:44 +00:00
------------------------- ----> 0x0020_0000
armv8/ls2085aqds: Add support of LS2085AQDS platform The LS2085AQDS is an evaluatoin platform that supports the LS2085A family SoCs. This patch add basic support of the platform. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2015-03-21 02:28:23 +00:00
| BootLoader + Env|
fsl-ch3/README: Add description for NOR flash layout (firmware images) This patch adds description for NOR flash layout (firmware images) in the README file for LS2085A platforms. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-03-19 16:20:44 +00:00
------------------------- ----> 0x0000_1000
| PBI |
------------------------- ----> 0x0000_0080
| RCW |
------------------------- ----> 0x0000_0000
armv8/ls2085aqds: Add support of LS2085AQDS platform The LS2085AQDS is an evaluatoin platform that supports the LS2085A family SoCs. This patch add basic support of the platform. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2015-03-21 02:28:23 +00:00
32-MB NOR flash layout for pre-silicon platforms (simulator and emulator)
(2) A typical layout of various images (including Linux and other firmware images)
is shown below considering a 128MB NOR flash device present on QDS
boards:
----------------------------------------- ----> 0x5_8800_0000 ---
| .. Unused .. (7M) | |
----------------------------------------- ----> 0x5_8790_0000 |
| FIT Image (linux + DTB + RFS) (40M) | |
----------------------------------------- ----> 0x5_8510_0000 |
| PHY firmware (2M) | |
----------------------------------------- ----> 0x5_84F0_0000 | 64K
| Debug Server FW (2M) | | Alt
----------------------------------------- ----> 0x5_84D0_0000 | Bank
| AIOP FW (4M) | |
----------------------------------------- ----> 0x5_8490_0000 (vbank4)
| MC DPC Blob (1M) | |
----------------------------------------- ----> 0x5_8480_0000 |
| MC DPL Blob (1M) | |
----------------------------------------- ----> 0x5_8470_0000 |
| MC FW (4M) | |
----------------------------------------- ----> 0x5_8430_0000 |
| BootLoader Environment (1M) | |
----------------------------------------- ----> 0x5_8420_0000 |
| BootLoader (1M) | |
----------------------------------------- ----> 0x5_8410_0000 |
| RCW and PBI (1M) | |
----------------------------------------- ----> 0x5_8400_0000 ---
| .. Unused .. (7M) | |
----------------------------------------- ----> 0x5_8390_0000 |
| FIT Image (linux + DTB + RFS) (40M) | |
----------------------------------------- ----> 0x5_8110_0000 |
| PHY firmware (2M) | |
----------------------------------------- ----> 0x5_80F0_0000 | 64K
| Debug Server FW (2M) | | Bank
----------------------------------------- ----> 0x5_80D0_0000 |
| AIOP FW (4M) | |
----------------------------------------- ----> 0x5_8090_0000 (vbank0)
| MC DPC Blob (1M) | |
----------------------------------------- ----> 0x5_8080_0000 |
| MC DPL Blob (1M) | |
----------------------------------------- ----> 0x5_8070_0000 |
| MC FW (4M) | |
----------------------------------------- ----> 0x5_8030_0000 |
| BootLoader Environment (1M) | |
----------------------------------------- ----> 0x5_8020_0000 |
| BootLoader (1M) | |
----------------------------------------- ----> 0x5_8010_0000 |
| RCW and PBI (1M) | |
----------------------------------------- ----> 0x5_8000_0000 ---
128-MB NOR flash layout for QDS board
drivers/fsl-mc: Changed MC firmware loading for new boot architecture Changed MC firmware loading to comply with the new MC boot architecture. Flush D-cache hierarchy after loading MC images. Add environment variables "mcboottimeout" for MC boot timeout in milliseconds, "mcmemsize" for MC DRAM block size. Check MC boot status before calling flib functions. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
2015-03-21 02:28:18 +00:00
Environment Variables
=====================
mcboottimeout: MC boot timeout in milliseconds. If this variable is not defined
the value CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS will be assumed.
mcmemsize: MC DRAM block size. If this variable is not defined, the value
CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE will be assumed.
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