mirror of
https://github.com/AsahiLinux/u-boot
synced 2025-01-08 11:18:53 +00:00
13 lines
346 B
Text
13 lines
346 B
Text
|
if RAM || SPL_RAM
|
||
|
|
|
||
|
|
config CADENCE_DDR_CTRL
|
||
|
|
bool "Enable Cadence DDR controller"
|
||
|
|
depends on DM
|
||
|
|
help
|
||
|
|
Enable support for Cadence DDR controller, as found on
|
||
|
|
the Renesas RZ/N1 SoC. This controller has a large number
|
||
|
|
of registers which need to be programmed, mostly using values
|
||
|
|
obtained from Denali SOMA files via a TCL script.
|
||
|
|
|
||
|
|
endif
|