2009-05-15 21:48:36 +00:00
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/*
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* Copyright (c) 2009 Wind River Systems, Inc.
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* Tom Rix <Tom.Rix@windriver.com>
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*
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* Derived from Zoom1 code by
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* Nishanth Menon <nm@ti.com>
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* Sunil Kumar <sunilsaini05@gmail.com>
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* Shashi Ranjan <shashiranjanmca05@gmail.com>
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* Richard Woodruff <r-woodruff2@ti.com>
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* Syed Mohammed Khasim <khasim@ti.com>
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*
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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2009-05-31 10:44:39 +00:00
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#ifdef CONFIG_STATUS_LED
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#include <status_led.h>
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#endif
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2009-05-15 21:48:36 +00:00
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#include <asm/io.h>
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2009-05-31 10:44:37 +00:00
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#include <asm/arch/mem.h>
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2009-05-15 21:48:36 +00:00
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#include <asm/arch/mux.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/mach-types.h>
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#include "zoom2.h"
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2009-05-31 10:44:37 +00:00
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#include "zoom2_serial.h"
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/*
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* This the the zoom2, board specific, gpmc configuration for the
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* quad uart on the debug board. The more general gpmc configurations
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* are setup at the cpu level in cpu/arm_cortexa8/omap3/mem.c
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*
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* The details of the setting of the serial gpmc setup are not available.
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* The values were provided by another party.
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*/
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extern void enable_gpmc_config(u32 *gpmc_config, gpmc_csx_t *gpmc_cs_base,
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u32 base, u32 size);
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static u32 gpmc_serial_TL16CP754C[GPMC_MAX_REG] = {
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0x00011000,
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0x001F1F01,
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0x00080803,
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0x1D091D09,
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0x041D1F1F,
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0x1D0904C4, 0
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};
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2009-05-15 21:48:36 +00:00
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/*
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* Routine: board_init
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* Description: Early hardware init.
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*/
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int board_init (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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2009-05-31 10:44:37 +00:00
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gpmc_csx_t *serial_cs_base;
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u32 *gpmc_config;
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2009-05-15 21:48:36 +00:00
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gpmc_init (); /* in SRAM or SDRAM, finish GPMC */
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2009-05-31 10:44:37 +00:00
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/* Configure console support on zoom2 */
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gpmc_config = gpmc_serial_TL16CP754C;
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serial_cs_base = (gpmc_csx_t *) (GPMC_CONFIG_CS0_BASE +
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(3 * GPMC_CONFIG_WIDTH));
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enable_gpmc_config(gpmc_config,
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serial_cs_base,
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SERIAL_TL16CP754C_BASE,
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GPMC_SIZE_16M);
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2009-05-15 21:48:36 +00:00
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/* board id for Linux */
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gd->bd->bi_arch_number = MACH_TYPE_OMAP_ZOOM2;
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/* boot param addr */
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gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
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2009-05-31 10:44:37 +00:00
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#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
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status_led_set (STATUS_LED_BOOT, STATUS_LED_ON);
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#endif
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2009-05-15 21:48:36 +00:00
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return 0;
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}
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/*
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* Routine: misc_init_r
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* Description: Configure zoom board specific configurations
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*/
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int misc_init_r (void)
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{
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power_init_r ();
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dieid_num_r ();
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return 0;
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}
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/*
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* Routine: set_muxconf_regs
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* Description: Setting up the configuration Mux registers specific to the
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* hardware. Many pins need to be moved from protect to primary
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* mode.
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*/
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void set_muxconf_regs (void)
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{
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/* platform specific muxes */
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MUX_ZOOM2 ();
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}
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