2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2017-12-26 05:55:49 +00:00
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/*
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* Copyright (c) 2016-17 Microsemi Corporation.
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* Padmarao Begari, Microsemi Corporation <padmarao.begari@microsemi.com>
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*
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* Copyright (C) 2017 Andes Technology Corporation
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* Rick Chen, Andes Technology Corporation <rick@andestech.com>
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2019-12-25 05:27:44 +00:00
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*
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* Copyright (C) 2019 Sean Anderson <seanga2@gmail.com>
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2017-12-26 05:55:49 +00:00
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*/
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#include <common.h>
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2020-08-01 15:15:39 +00:00
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#include <efi_loader.h>
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2019-12-28 17:45:07 +00:00
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#include <hang.h>
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2019-11-14 19:57:41 +00:00
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#include <irq_func.h>
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2020-10-31 03:38:53 +00:00
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#include <asm/global_data.h>
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2017-12-26 05:55:49 +00:00
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#include <asm/ptrace.h>
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#include <asm/system.h>
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#include <asm/encoding.h>
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2020-08-01 15:15:39 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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static void show_efi_loaded_images(uintptr_t epc)
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{
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efi_print_image_infos((void *)epc);
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}
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2019-12-25 05:27:44 +00:00
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static void show_regs(struct pt_regs *regs)
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{
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#ifdef CONFIG_SHOW_REGS
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2020-12-02 13:36:26 +00:00
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printf("\nSP: " REG_FMT " GP: " REG_FMT " TP: " REG_FMT "\n",
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2020-08-01 15:15:39 +00:00
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regs->sp, regs->gp, regs->tp);
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printf("T0: " REG_FMT " T1: " REG_FMT " T2: " REG_FMT "\n",
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regs->t0, regs->t1, regs->t2);
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printf("S0: " REG_FMT " S1: " REG_FMT " A0: " REG_FMT "\n",
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regs->s0, regs->s1, regs->a0);
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printf("A1: " REG_FMT " A2: " REG_FMT " A3: " REG_FMT "\n",
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regs->a1, regs->a2, regs->a3);
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printf("A4: " REG_FMT " A5: " REG_FMT " A6: " REG_FMT "\n",
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regs->a4, regs->a5, regs->a6);
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printf("A7: " REG_FMT " S2: " REG_FMT " S3: " REG_FMT "\n",
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regs->a7, regs->s2, regs->s3);
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printf("S4: " REG_FMT " S5: " REG_FMT " S6: " REG_FMT "\n",
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regs->s4, regs->s5, regs->s6);
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printf("S7: " REG_FMT " S8: " REG_FMT " S9: " REG_FMT "\n",
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regs->s7, regs->s8, regs->s9);
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printf("S10: " REG_FMT " S11: " REG_FMT " T3: " REG_FMT "\n",
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regs->s10, regs->s11, regs->t3);
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2020-12-02 13:36:26 +00:00
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printf("T4: " REG_FMT " T5: " REG_FMT " T6: " REG_FMT "\n",
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2020-08-01 15:15:39 +00:00
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regs->t4, regs->t5, regs->t6);
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2019-12-25 05:27:44 +00:00
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#endif
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}
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static void _exit_trap(ulong code, ulong epc, ulong tval, struct pt_regs *regs)
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2018-12-12 14:12:44 +00:00
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{
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static const char * const exception_code[] = {
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"Instruction address misaligned",
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"Instruction access fault",
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"Illegal instruction",
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"Breakpoint",
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"Load address misaligned",
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"Load access fault",
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"Store/AMO address misaligned",
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"Store/AMO access fault",
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"Environment call from U-mode",
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"Environment call from S-mode",
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"Reserved",
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"Environment call from M-mode",
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"Instruction page fault",
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"Load page fault",
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"Reserved",
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"Store/AMO page fault",
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};
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2019-12-25 05:27:44 +00:00
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if (code < ARRAY_SIZE(exception_code))
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printf("Unhandled exception: %s\n", exception_code[code]);
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else
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printf("Unhandled exception code: %ld\n", code);
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2018-12-12 14:12:44 +00:00
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2020-08-01 15:15:39 +00:00
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printf("EPC: " REG_FMT " RA: " REG_FMT " TVAL: " REG_FMT "\n",
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epc, regs->ra, tval);
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riscv: Ensure gp is NULL or points to valid data
This ensures constructs like `if (gd & gd->...) { ... }` work when
accessing the global data pointer. Without this change, it was possible for
a very early trap to cause _exit_trap to directly or indirectly (through
printf) to read arbitrary memory. This could cause a second trap,
preventing show_regs from being printed.
printf (and specifically puts) uses gd to determine what function to print
with. These functions in turn use gd to find the serial device, etc.
However, before accessing gd, puts first checks to see if it is non-NULL.
This indicates an existing (perhaps undocumented) assumption that either gd
is NULL or it is completely valid.
Before this patch, gd either points to unexpected data (because it retains
the value it did from the prior-stage) or points to uninitialized data
(because it has not yet been initialized by board_init_f_init_reserve)
until the hart has acquired available_harts_lock. This can cause two
problems, depending on the value of gd->flags. If GD_FLG_SERIAL_READY is
unset, then some garbage data will be printed to stdout, but there will not
be a second trap. However, if GD_FLG_SERIAL_READY is set, then puts will
try to print with serial_puts, which will likely cause a second trap.
After this patch, gd is zero up until either a hart has set it in
wait_for_gd_init, or until it is set by arch_init_gd. This prevents its
usage before its data is initialized because both handle_trap and puts
ensure that gd is nonzero before using it. After gd has been set, it is OK
to access it because its data has been cleared (and so flags is valid).
XIP cannot use locks because flash is not writable. This leaves it
vulnerable to the same class of bugs regarding already-pending IPIs as
before this series. Fixing that would require finding another method of
synchronization, which is outside the scope of this series.
Fixes: 7c6ca03eae ("riscv: additional crash information")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-09-21 11:51:40 +00:00
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/* Print relocation adjustments, but only if gd is initialized */
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if (gd && gd->flags & GD_FLG_RELOC)
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2020-12-02 13:36:26 +00:00
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printf("EPC: " REG_FMT " RA: " REG_FMT " reloc adjusted\n",
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2020-08-01 15:15:39 +00:00
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epc - gd->reloc_off, regs->ra - gd->reloc_off);
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2019-12-25 05:27:44 +00:00
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show_regs(regs);
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2020-08-01 15:15:39 +00:00
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show_efi_loaded_images(epc);
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2020-12-02 13:36:26 +00:00
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panic("\n");
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2018-12-12 14:12:44 +00:00
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}
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2017-12-26 05:55:49 +00:00
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int interrupt_init(void)
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{
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return 0;
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}
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/*
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* enable interrupts
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*/
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void enable_interrupts(void)
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{
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}
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/*
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* disable interrupts
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*/
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int disable_interrupts(void)
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{
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return 0;
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}
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2019-12-25 05:27:44 +00:00
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ulong handle_trap(ulong cause, ulong epc, ulong tval, struct pt_regs *regs)
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2017-12-26 05:55:49 +00:00
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{
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2018-12-03 05:27:40 +00:00
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ulong is_irq, irq;
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2017-12-26 05:55:49 +00:00
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2020-09-26 05:50:36 +00:00
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/* An UEFI application may have changed gd. Restore U-Boot's gd. */
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efi_restore_gd();
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2018-12-03 05:27:40 +00:00
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is_irq = (cause & MCAUSE_INT);
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irq = (cause & ~MCAUSE_INT);
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if (is_irq) {
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switch (irq) {
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case IRQ_M_EXT:
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case IRQ_S_EXT:
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external_interrupt(0); /* handle external interrupt */
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break;
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case IRQ_M_TIMER:
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case IRQ_S_TIMER:
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timer_interrupt(0); /* handle timer interrupt */
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break;
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default:
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2019-12-25 05:27:44 +00:00
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_exit_trap(cause, epc, tval, regs);
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2018-12-03 05:27:40 +00:00
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break;
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};
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} else {
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2019-12-25 05:27:44 +00:00
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_exit_trap(cause, epc, tval, regs);
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2018-12-03 05:27:40 +00:00
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}
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2017-12-26 05:55:49 +00:00
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return epc;
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}
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/*
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*Entry Point for PLIC Interrupt Handler
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*/
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__attribute__((weak)) void external_interrupt(struct pt_regs *regs)
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{
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}
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__attribute__((weak)) void timer_interrupt(struct pt_regs *regs)
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{
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}
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