2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2013-05-15 07:29:24 +00:00
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/*
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* Faraday USB 2.0 OTG Controller
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*
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* (C) Copyright 2010 Faraday Technology
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* Dante Su <dantesu@faraday-tech.com>
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*/
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#include <common.h>
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#include <command.h>
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#include <config.h>
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2019-11-14 19:57:39 +00:00
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#include <cpu_func.h>
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2013-05-15 07:29:24 +00:00
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#include <net.h>
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#include <malloc.h>
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#include <asm/io.h>
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2016-09-21 02:28:55 +00:00
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#include <linux/errno.h>
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2013-05-15 07:29:24 +00:00
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#include <linux/types.h>
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#include <linux/usb/ch9.h>
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#include <linux/usb/gadget.h>
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#include <usb/fotg210.h>
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#define CFG_NUM_ENDPOINTS 4
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#define CFG_EP0_MAX_PACKET_SIZE 64
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#define CFG_EPX_MAX_PACKET_SIZE 512
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#define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ >> 2) /* 250 ms */
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struct fotg210_chip;
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struct fotg210_ep {
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struct usb_ep ep;
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uint maxpacket;
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uint id;
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uint stopped;
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struct list_head queue;
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struct fotg210_chip *chip;
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const struct usb_endpoint_descriptor *desc;
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};
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struct fotg210_request {
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struct usb_request req;
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struct list_head queue;
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struct fotg210_ep *ep;
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};
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struct fotg210_chip {
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struct usb_gadget gadget;
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struct usb_gadget_driver *driver;
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struct fotg210_regs *regs;
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uint8_t irq;
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uint16_t addr;
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int pullup;
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enum usb_device_state state;
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struct fotg210_ep ep[1 + CFG_NUM_ENDPOINTS];
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};
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static struct usb_endpoint_descriptor ep0_desc = {
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.bLength = sizeof(struct usb_endpoint_descriptor),
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.bDescriptorType = USB_DT_ENDPOINT,
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.bEndpointAddress = USB_DIR_IN,
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.bmAttributes = USB_ENDPOINT_XFER_CONTROL,
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};
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static inline int fifo_to_ep(struct fotg210_chip *chip, int id, int in)
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{
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return (id < 0) ? 0 : ((id & 0x03) + 1);
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}
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static inline int ep_to_fifo(struct fotg210_chip *chip, int id)
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{
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return (id <= 0) ? -1 : ((id - 1) & 0x03);
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}
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static inline int ep_reset(struct fotg210_chip *chip, uint8_t ep_addr)
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{
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int ep = ep_addr & USB_ENDPOINT_NUMBER_MASK;
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struct fotg210_regs *regs = chip->regs;
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if (ep_addr & USB_DIR_IN) {
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/* reset endpoint */
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setbits_le32(®s->iep[ep - 1], IEP_RESET);
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mdelay(1);
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clrbits_le32(®s->iep[ep - 1], IEP_RESET);
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/* clear endpoint stall */
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clrbits_le32(®s->iep[ep - 1], IEP_STALL);
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} else {
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/* reset endpoint */
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setbits_le32(®s->oep[ep - 1], OEP_RESET);
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mdelay(1);
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clrbits_le32(®s->oep[ep - 1], OEP_RESET);
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/* clear endpoint stall */
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clrbits_le32(®s->oep[ep - 1], OEP_STALL);
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}
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return 0;
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}
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static int fotg210_reset(struct fotg210_chip *chip)
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{
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struct fotg210_regs *regs = chip->regs;
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uint32_t i;
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chip->state = USB_STATE_POWERED;
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/* chip enable */
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writel(DEVCTRL_EN, ®s->dev_ctrl);
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/* device address reset */
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chip->addr = 0;
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writel(0, ®s->dev_addr);
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/* set idle counter to 7ms */
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writel(7, ®s->idle);
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/* disable all interrupts */
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writel(IMR_MASK, ®s->imr);
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writel(GIMR_MASK, ®s->gimr);
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writel(GIMR0_MASK, ®s->gimr0);
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writel(GIMR1_MASK, ®s->gimr1);
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writel(GIMR2_MASK, ®s->gimr2);
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/* clear interrupts */
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writel(ISR_MASK, ®s->isr);
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writel(0, ®s->gisr);
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writel(0, ®s->gisr0);
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writel(0, ®s->gisr1);
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writel(0, ®s->gisr2);
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/* chip reset */
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setbits_le32(®s->dev_ctrl, DEVCTRL_RESET);
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mdelay(10);
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if (readl(®s->dev_ctrl) & DEVCTRL_RESET) {
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printf("fotg210: chip reset failed\n");
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return -1;
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}
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/* CX FIFO reset */
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setbits_le32(®s->cxfifo, CXFIFO_CXFIFOCLR);
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mdelay(10);
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if (readl(®s->cxfifo) & CXFIFO_CXFIFOCLR) {
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printf("fotg210: ep0 fifo reset failed\n");
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return -1;
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}
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/* create static ep-fifo map (EP1 <-> FIFO0, EP2 <-> FIFO1 ...) */
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writel(EPMAP14_DEFAULT, ®s->epmap14);
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writel(EPMAP58_DEFAULT, ®s->epmap58);
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writel(FIFOMAP_DEFAULT, ®s->fifomap);
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writel(0, ®s->fifocfg);
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for (i = 0; i < 8; ++i) {
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writel(CFG_EPX_MAX_PACKET_SIZE, ®s->iep[i]);
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writel(CFG_EPX_MAX_PACKET_SIZE, ®s->oep[i]);
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}
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/* FIFO reset */
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for (i = 0; i < 4; ++i) {
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writel(FIFOCSR_RESET, ®s->fifocsr[i]);
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mdelay(10);
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if (readl(®s->fifocsr[i]) & FIFOCSR_RESET) {
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printf("fotg210: fifo%d reset failed\n", i);
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return -1;
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}
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}
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/* enable only device interrupt and triggered at level-high */
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writel(IMR_IRQLH | IMR_HOST | IMR_OTG, ®s->imr);
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writel(ISR_MASK, ®s->isr);
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/* disable EP0 IN/OUT interrupt */
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writel(GIMR0_CXOUT | GIMR0_CXIN, ®s->gimr0);
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/* disable EPX IN+SPK+OUT interrupts */
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writel(GIMR1_MASK, ®s->gimr1);
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/* disable wakeup+idle+dma+zlp interrupts */
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writel(GIMR2_WAKEUP | GIMR2_IDLE | GIMR2_DMAERR | GIMR2_DMAFIN
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| GIMR2_ZLPRX | GIMR2_ZLPTX, ®s->gimr2);
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/* enable all group interrupt */
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writel(0, ®s->gimr);
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/* suspend delay = 3 ms */
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writel(3, ®s->idle);
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/* turn-on device interrupts */
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setbits_le32(®s->dev_ctrl, DEVCTRL_GIRQ_EN);
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return 0;
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}
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static inline int fotg210_cxwait(struct fotg210_chip *chip, uint32_t mask)
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{
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struct fotg210_regs *regs = chip->regs;
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int ret = -1;
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ulong ts;
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for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) {
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if ((readl(®s->cxfifo) & mask) != mask)
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continue;
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ret = 0;
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break;
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}
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if (ret)
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printf("fotg210: cx/ep0 timeout\n");
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return ret;
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}
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static int fotg210_dma(struct fotg210_ep *ep, struct fotg210_request *req)
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{
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struct fotg210_chip *chip = ep->chip;
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struct fotg210_regs *regs = chip->regs;
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uint32_t tmp, ts;
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uint8_t *buf = req->req.buf + req->req.actual;
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uint32_t len = req->req.length - req->req.actual;
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int fifo = ep_to_fifo(chip, ep->id);
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int ret = -EBUSY;
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/* 1. init dma buffer */
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if (len > ep->maxpacket)
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len = ep->maxpacket;
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/* 2. wait for dma ready (hardware) */
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for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) {
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if (!(readl(®s->dma_ctrl) & DMACTRL_START)) {
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ret = 0;
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break;
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}
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}
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if (ret) {
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printf("fotg210: dma busy\n");
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req->req.status = ret;
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return ret;
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}
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/* 3. DMA target setup */
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if (ep->desc->bEndpointAddress & USB_DIR_IN)
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flush_dcache_range((ulong)buf, (ulong)buf + len);
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else
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invalidate_dcache_range((ulong)buf, (ulong)buf + len);
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writel(virt_to_phys(buf), ®s->dma_addr);
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if (ep->desc->bEndpointAddress & USB_DIR_IN) {
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if (ep->id == 0) {
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/* Wait until cx/ep0 fifo empty */
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fotg210_cxwait(chip, CXFIFO_CXFIFOE);
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2013-12-20 04:33:00 +00:00
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udelay(1);
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2013-05-15 07:29:24 +00:00
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writel(DMAFIFO_CX, ®s->dma_fifo);
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} else {
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/* Wait until epx fifo empty */
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fotg210_cxwait(chip, CXFIFO_FIFOE(fifo));
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writel(DMAFIFO_FIFO(fifo), ®s->dma_fifo);
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}
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writel(DMACTRL_LEN(len) | DMACTRL_MEM2FIFO, ®s->dma_ctrl);
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} else {
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uint32_t blen;
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if (ep->id == 0) {
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writel(DMAFIFO_CX, ®s->dma_fifo);
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do {
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blen = CXFIFO_BYTES(readl(®s->cxfifo));
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} while (blen < len);
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} else {
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writel(DMAFIFO_FIFO(fifo), ®s->dma_fifo);
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blen = FIFOCSR_BYTES(readl(®s->fifocsr[fifo]));
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}
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len = (len < blen) ? len : blen;
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writel(DMACTRL_LEN(len) | DMACTRL_FIFO2MEM, ®s->dma_ctrl);
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}
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/* 4. DMA start */
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setbits_le32(®s->dma_ctrl, DMACTRL_START);
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/* 5. DMA wait */
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ret = -EBUSY;
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for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) {
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tmp = readl(®s->gisr2);
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/* DMA complete */
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if (tmp & GISR2_DMAFIN) {
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ret = 0;
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break;
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}
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/* DMA error */
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if (tmp & GISR2_DMAERR) {
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printf("fotg210: dma error\n");
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break;
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}
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/* resume, suspend, reset */
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if (tmp & (GISR2_RESUME | GISR2_SUSPEND | GISR2_RESET)) {
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printf("fotg210: dma reset by host\n");
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break;
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}
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}
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/* 7. DMA target reset */
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if (ret)
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writel(DMACTRL_ABORT | DMACTRL_CLRFF, ®s->dma_ctrl);
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writel(0, ®s->gisr2);
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writel(0, ®s->dma_fifo);
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req->req.status = ret;
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if (!ret)
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req->req.actual += len;
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else
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printf("fotg210: ep%d dma error(code=%d)\n", ep->id, ret);
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return len;
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}
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/*
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* result of setup packet
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*/
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#define CX_IDLE 0
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#define CX_FINISH 1
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#define CX_STALL 2
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static void fotg210_setup(struct fotg210_chip *chip)
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{
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int id, ret = CX_IDLE;
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uint32_t tmp[2];
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struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)tmp;
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struct fotg210_regs *regs = chip->regs;
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/*
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* If this is the first Cx 8 byte command,
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* we can now query USB mode (high/full speed; USB 2.0/USB 1.0)
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*/
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if (chip->state == USB_STATE_POWERED) {
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chip->state = USB_STATE_DEFAULT;
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if (readl(®s->otgcsr) & OTGCSR_DEV_B) {
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/* Mini-B */
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if (readl(®s->dev_ctrl) & DEVCTRL_HS) {
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puts("fotg210: HS\n");
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chip->gadget.speed = USB_SPEED_HIGH;
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/* SOF mask timer = 1100 ticks */
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writel(SOFMTR_TMR(1100), ®s->sof_mtr);
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} else {
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puts("fotg210: FS\n");
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chip->gadget.speed = USB_SPEED_FULL;
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/* SOF mask timer = 10000 ticks */
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writel(SOFMTR_TMR(10000), ®s->sof_mtr);
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}
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} else {
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printf("fotg210: mini-A?\n");
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}
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}
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/* switch data port to ep0 */
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writel(DMAFIFO_CX, ®s->dma_fifo);
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/* fetch 8 bytes setup packet */
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|
tmp[0] = readl(®s->ep0_data);
|
|
|
|
tmp[1] = readl(®s->ep0_data);
|
|
|
|
/* release data port */
|
|
|
|
writel(0, ®s->dma_fifo);
|
|
|
|
|
|
|
|
if (req->bRequestType & USB_DIR_IN)
|
|
|
|
ep0_desc.bEndpointAddress = USB_DIR_IN;
|
|
|
|
else
|
|
|
|
ep0_desc.bEndpointAddress = USB_DIR_OUT;
|
|
|
|
|
|
|
|
ret = CX_IDLE;
|
|
|
|
|
|
|
|
if ((req->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
|
|
|
|
switch (req->bRequest) {
|
|
|
|
case USB_REQ_SET_CONFIGURATION:
|
|
|
|
debug("fotg210: set_cfg(%d)\n", req->wValue & 0x00FF);
|
|
|
|
if (!(req->wValue & 0x00FF)) {
|
|
|
|
chip->state = USB_STATE_ADDRESS;
|
|
|
|
writel(chip->addr, ®s->dev_addr);
|
|
|
|
} else {
|
|
|
|
chip->state = USB_STATE_CONFIGURED;
|
|
|
|
writel(chip->addr | DEVADDR_CONF,
|
|
|
|
®s->dev_addr);
|
|
|
|
}
|
|
|
|
ret = CX_IDLE;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case USB_REQ_SET_ADDRESS:
|
|
|
|
debug("fotg210: set_addr(0x%04X)\n", req->wValue);
|
|
|
|
chip->state = USB_STATE_ADDRESS;
|
|
|
|
chip->addr = req->wValue & DEVADDR_ADDR_MASK;
|
|
|
|
ret = CX_FINISH;
|
|
|
|
writel(chip->addr, ®s->dev_addr);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case USB_REQ_CLEAR_FEATURE:
|
|
|
|
debug("fotg210: clr_feature(%d, %d)\n",
|
|
|
|
req->bRequestType & 0x03, req->wValue);
|
|
|
|
switch (req->wValue) {
|
|
|
|
case 0: /* [Endpoint] halt */
|
|
|
|
ep_reset(chip, req->wIndex);
|
|
|
|
ret = CX_FINISH;
|
|
|
|
break;
|
|
|
|
case 1: /* [Device] remote wake-up */
|
|
|
|
case 2: /* [Device] test mode */
|
|
|
|
default:
|
|
|
|
ret = CX_STALL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case USB_REQ_SET_FEATURE:
|
|
|
|
debug("fotg210: set_feature(%d, %d)\n",
|
|
|
|
req->wValue, req->wIndex & 0xf);
|
|
|
|
switch (req->wValue) {
|
|
|
|
case 0: /* Endpoint Halt */
|
|
|
|
id = req->wIndex & 0xf;
|
|
|
|
setbits_le32(®s->iep[id - 1], IEP_STALL);
|
|
|
|
setbits_le32(®s->oep[id - 1], OEP_STALL);
|
|
|
|
ret = CX_FINISH;
|
|
|
|
break;
|
|
|
|
case 1: /* Remote Wakeup */
|
|
|
|
case 2: /* Test Mode */
|
|
|
|
default:
|
|
|
|
ret = CX_STALL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case USB_REQ_GET_STATUS:
|
|
|
|
debug("fotg210: get_status\n");
|
|
|
|
ret = CX_STALL;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case USB_REQ_SET_DESCRIPTOR:
|
|
|
|
debug("fotg210: set_descriptor\n");
|
|
|
|
ret = CX_STALL;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case USB_REQ_SYNCH_FRAME:
|
|
|
|
debug("fotg210: sync frame\n");
|
|
|
|
ret = CX_STALL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
} /* if ((req->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) */
|
|
|
|
|
|
|
|
if (ret == CX_IDLE && chip->driver->setup) {
|
|
|
|
if (chip->driver->setup(&chip->gadget, req) < 0)
|
|
|
|
ret = CX_STALL;
|
|
|
|
else
|
|
|
|
ret = CX_FINISH;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (ret) {
|
|
|
|
case CX_FINISH:
|
|
|
|
setbits_le32(®s->cxfifo, CXFIFO_CXFIN);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case CX_STALL:
|
|
|
|
setbits_le32(®s->cxfifo, CXFIFO_CXSTALL | CXFIFO_CXFIN);
|
|
|
|
printf("fotg210: cx_stall!\n");
|
|
|
|
break;
|
|
|
|
|
|
|
|
case CX_IDLE:
|
|
|
|
debug("fotg210: cx_idle?\n");
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* fifo - FIFO id
|
|
|
|
* zlp - zero length packet
|
|
|
|
*/
|
|
|
|
static void fotg210_recv(struct fotg210_chip *chip, int ep_id)
|
|
|
|
{
|
|
|
|
struct fotg210_regs *regs = chip->regs;
|
|
|
|
struct fotg210_ep *ep = chip->ep + ep_id;
|
|
|
|
struct fotg210_request *req;
|
|
|
|
int len;
|
|
|
|
|
|
|
|
if (ep->stopped || (ep->desc->bEndpointAddress & USB_DIR_IN)) {
|
|
|
|
printf("fotg210: ep%d recv, invalid!\n", ep->id);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (list_empty(&ep->queue)) {
|
|
|
|
printf("fotg210: ep%d recv, drop!\n", ep->id);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
req = list_first_entry(&ep->queue, struct fotg210_request, queue);
|
|
|
|
len = fotg210_dma(ep, req);
|
|
|
|
if (len < ep->ep.maxpacket || req->req.length <= req->req.actual) {
|
|
|
|
list_del_init(&req->queue);
|
|
|
|
if (req->req.complete)
|
|
|
|
req->req.complete(&ep->ep, &req->req);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ep->id > 0 && list_empty(&ep->queue)) {
|
|
|
|
setbits_le32(®s->gimr1,
|
|
|
|
GIMR1_FIFO_RX(ep_to_fifo(chip, ep->id)));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* USB Gadget Layer
|
|
|
|
*/
|
|
|
|
static int fotg210_ep_enable(
|
|
|
|
struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
|
|
|
|
{
|
|
|
|
struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
|
|
|
|
struct fotg210_chip *chip = ep->chip;
|
|
|
|
struct fotg210_regs *regs = chip->regs;
|
|
|
|
int id = ep_to_fifo(chip, ep->id);
|
|
|
|
int in = (desc->bEndpointAddress & USB_DIR_IN) ? 1 : 0;
|
|
|
|
|
|
|
|
if (!_ep || !desc
|
|
|
|
|| desc->bDescriptorType != USB_DT_ENDPOINT
|
|
|
|
|| le16_to_cpu(desc->wMaxPacketSize) == 0) {
|
|
|
|
printf("fotg210: bad ep or descriptor\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ep->desc = desc;
|
|
|
|
ep->stopped = 0;
|
|
|
|
|
|
|
|
if (in)
|
|
|
|
setbits_le32(®s->fifomap, FIFOMAP(id, FIFOMAP_IN));
|
|
|
|
|
|
|
|
switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
|
|
|
|
case USB_ENDPOINT_XFER_CONTROL:
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
case USB_ENDPOINT_XFER_ISOC:
|
|
|
|
setbits_le32(®s->fifocfg,
|
|
|
|
FIFOCFG(id, FIFOCFG_EN | FIFOCFG_ISOC));
|
|
|
|
break;
|
|
|
|
|
|
|
|
case USB_ENDPOINT_XFER_BULK:
|
|
|
|
setbits_le32(®s->fifocfg,
|
|
|
|
FIFOCFG(id, FIFOCFG_EN | FIFOCFG_BULK));
|
|
|
|
break;
|
|
|
|
|
|
|
|
case USB_ENDPOINT_XFER_INT:
|
|
|
|
setbits_le32(®s->fifocfg,
|
|
|
|
FIFOCFG(id, FIFOCFG_EN | FIFOCFG_INTR));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int fotg210_ep_disable(struct usb_ep *_ep)
|
|
|
|
{
|
|
|
|
struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
|
|
|
|
struct fotg210_chip *chip = ep->chip;
|
|
|
|
struct fotg210_regs *regs = chip->regs;
|
|
|
|
int id = ep_to_fifo(chip, ep->id);
|
|
|
|
|
|
|
|
ep->desc = NULL;
|
|
|
|
ep->stopped = 1;
|
|
|
|
|
|
|
|
clrbits_le32(®s->fifocfg, FIFOCFG(id, FIFOCFG_CFG_MASK));
|
|
|
|
clrbits_le32(®s->fifomap, FIFOMAP(id, FIFOMAP_DIR_MASK));
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct usb_request *fotg210_ep_alloc_request(
|
|
|
|
struct usb_ep *_ep, gfp_t gfp_flags)
|
|
|
|
{
|
|
|
|
struct fotg210_request *req = malloc(sizeof(*req));
|
|
|
|
|
|
|
|
if (req) {
|
|
|
|
memset(req, 0, sizeof(*req));
|
|
|
|
INIT_LIST_HEAD(&req->queue);
|
|
|
|
}
|
|
|
|
return &req->req;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void fotg210_ep_free_request(
|
|
|
|
struct usb_ep *_ep, struct usb_request *_req)
|
|
|
|
{
|
|
|
|
struct fotg210_request *req;
|
|
|
|
|
|
|
|
req = container_of(_req, struct fotg210_request, req);
|
|
|
|
free(req);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int fotg210_ep_queue(
|
|
|
|
struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
|
|
|
|
{
|
|
|
|
struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
|
|
|
|
struct fotg210_chip *chip = ep->chip;
|
|
|
|
struct fotg210_regs *regs = chip->regs;
|
|
|
|
struct fotg210_request *req;
|
|
|
|
|
|
|
|
req = container_of(_req, struct fotg210_request, req);
|
|
|
|
if (!_req || !_req->complete || !_req->buf
|
|
|
|
|| !list_empty(&req->queue)) {
|
|
|
|
printf("fotg210: invalid request to ep%d\n", ep->id);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!chip || chip->state == USB_STATE_SUSPENDED) {
|
|
|
|
printf("fotg210: request while chip suspended\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
req->req.actual = 0;
|
|
|
|
req->req.status = -EINPROGRESS;
|
|
|
|
|
|
|
|
if (req->req.length == 0) {
|
|
|
|
req->req.status = 0;
|
|
|
|
if (req->req.complete)
|
|
|
|
req->req.complete(&ep->ep, &req->req);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ep->id == 0) {
|
|
|
|
do {
|
|
|
|
int len = fotg210_dma(ep, req);
|
|
|
|
if (len < ep->ep.maxpacket)
|
|
|
|
break;
|
|
|
|
if (ep->desc->bEndpointAddress & USB_DIR_IN)
|
|
|
|
udelay(100);
|
|
|
|
} while (req->req.length > req->req.actual);
|
|
|
|
} else {
|
|
|
|
if (ep->desc->bEndpointAddress & USB_DIR_IN) {
|
|
|
|
do {
|
|
|
|
int len = fotg210_dma(ep, req);
|
|
|
|
if (len < ep->ep.maxpacket)
|
|
|
|
break;
|
|
|
|
} while (req->req.length > req->req.actual);
|
|
|
|
} else {
|
|
|
|
list_add_tail(&req->queue, &ep->queue);
|
|
|
|
clrbits_le32(®s->gimr1,
|
|
|
|
GIMR1_FIFO_RX(ep_to_fifo(chip, ep->id)));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ep->id == 0 || (ep->desc->bEndpointAddress & USB_DIR_IN)) {
|
|
|
|
if (req->req.complete)
|
|
|
|
req->req.complete(&ep->ep, &req->req);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int fotg210_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
|
|
|
|
{
|
|
|
|
struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
|
|
|
|
struct fotg210_request *req;
|
|
|
|
|
|
|
|
/* make sure it's actually queued on this endpoint */
|
|
|
|
list_for_each_entry(req, &ep->queue, queue) {
|
|
|
|
if (&req->req == _req)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (&req->req != _req)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/* remove the request */
|
|
|
|
list_del_init(&req->queue);
|
|
|
|
|
|
|
|
/* update status & invoke complete callback */
|
|
|
|
if (req->req.status == -EINPROGRESS) {
|
|
|
|
req->req.status = -ECONNRESET;
|
|
|
|
if (req->req.complete)
|
|
|
|
req->req.complete(_ep, &req->req);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int fotg210_ep_halt(struct usb_ep *_ep, int halt)
|
|
|
|
{
|
|
|
|
struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
|
|
|
|
struct fotg210_chip *chip = ep->chip;
|
|
|
|
struct fotg210_regs *regs = chip->regs;
|
|
|
|
int ret = -1;
|
|
|
|
|
|
|
|
debug("fotg210: ep%d halt=%d\n", ep->id, halt);
|
|
|
|
|
|
|
|
/* Endpoint STALL */
|
|
|
|
if (ep->id > 0 && ep->id <= CFG_NUM_ENDPOINTS) {
|
|
|
|
if (halt) {
|
|
|
|
/* wait until all ep fifo empty */
|
|
|
|
fotg210_cxwait(chip, 0xf00);
|
|
|
|
/* stall */
|
|
|
|
if (ep->desc->bEndpointAddress & USB_DIR_IN) {
|
|
|
|
setbits_le32(®s->iep[ep->id - 1],
|
|
|
|
IEP_STALL);
|
|
|
|
} else {
|
|
|
|
setbits_le32(®s->oep[ep->id - 1],
|
|
|
|
OEP_STALL);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (ep->desc->bEndpointAddress & USB_DIR_IN) {
|
|
|
|
clrbits_le32(®s->iep[ep->id - 1],
|
|
|
|
IEP_STALL);
|
|
|
|
} else {
|
|
|
|
clrbits_le32(®s->oep[ep->id - 1],
|
|
|
|
OEP_STALL);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
ret = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* activate/deactivate link with host.
|
|
|
|
*/
|
|
|
|
static void pullup(struct fotg210_chip *chip, int is_on)
|
|
|
|
{
|
|
|
|
struct fotg210_regs *regs = chip->regs;
|
|
|
|
|
|
|
|
if (is_on) {
|
|
|
|
if (!chip->pullup) {
|
|
|
|
chip->state = USB_STATE_POWERED;
|
|
|
|
chip->pullup = 1;
|
|
|
|
/* enable the chip */
|
|
|
|
setbits_le32(®s->dev_ctrl, DEVCTRL_EN);
|
|
|
|
/* clear unplug bit (BIT0) */
|
|
|
|
clrbits_le32(®s->phy_tmsr, PHYTMSR_UNPLUG);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
chip->state = USB_STATE_NOTATTACHED;
|
|
|
|
chip->pullup = 0;
|
|
|
|
chip->addr = 0;
|
|
|
|
writel(chip->addr, ®s->dev_addr);
|
|
|
|
/* set unplug bit (BIT0) */
|
|
|
|
setbits_le32(®s->phy_tmsr, PHYTMSR_UNPLUG);
|
|
|
|
/* disable the chip */
|
|
|
|
clrbits_le32(®s->dev_ctrl, DEVCTRL_EN);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int fotg210_pullup(struct usb_gadget *_gadget, int is_on)
|
|
|
|
{
|
|
|
|
struct fotg210_chip *chip;
|
|
|
|
|
|
|
|
chip = container_of(_gadget, struct fotg210_chip, gadget);
|
|
|
|
|
|
|
|
debug("fotg210: pullup=%d\n", is_on);
|
|
|
|
|
|
|
|
pullup(chip, is_on);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int fotg210_get_frame(struct usb_gadget *_gadget)
|
|
|
|
{
|
|
|
|
struct fotg210_chip *chip;
|
|
|
|
struct fotg210_regs *regs;
|
|
|
|
|
|
|
|
chip = container_of(_gadget, struct fotg210_chip, gadget);
|
|
|
|
regs = chip->regs;
|
|
|
|
|
|
|
|
return SOFFNR_FNR(readl(®s->sof_fnr));
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct usb_gadget_ops fotg210_gadget_ops = {
|
|
|
|
.get_frame = fotg210_get_frame,
|
|
|
|
.pullup = fotg210_pullup,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct usb_ep_ops fotg210_ep_ops = {
|
|
|
|
.enable = fotg210_ep_enable,
|
|
|
|
.disable = fotg210_ep_disable,
|
|
|
|
.queue = fotg210_ep_queue,
|
|
|
|
.dequeue = fotg210_ep_dequeue,
|
|
|
|
.set_halt = fotg210_ep_halt,
|
|
|
|
.alloc_request = fotg210_ep_alloc_request,
|
|
|
|
.free_request = fotg210_ep_free_request,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct fotg210_chip controller = {
|
|
|
|
.regs = (void __iomem *)CONFIG_FOTG210_BASE,
|
|
|
|
.gadget = {
|
|
|
|
.name = "fotg210_udc",
|
|
|
|
.ops = &fotg210_gadget_ops,
|
|
|
|
.ep0 = &controller.ep[0].ep,
|
|
|
|
.speed = USB_SPEED_UNKNOWN,
|
|
|
|
.is_dualspeed = 1,
|
|
|
|
.is_otg = 0,
|
|
|
|
.is_a_peripheral = 0,
|
|
|
|
.b_hnp_enable = 0,
|
|
|
|
.a_hnp_support = 0,
|
|
|
|
.a_alt_hnp_support = 0,
|
|
|
|
},
|
|
|
|
.ep[0] = {
|
|
|
|
.id = 0,
|
|
|
|
.ep = {
|
|
|
|
.name = "ep0",
|
|
|
|
.ops = &fotg210_ep_ops,
|
|
|
|
},
|
|
|
|
.desc = &ep0_desc,
|
|
|
|
.chip = &controller,
|
|
|
|
.maxpacket = CFG_EP0_MAX_PACKET_SIZE,
|
|
|
|
},
|
|
|
|
.ep[1] = {
|
|
|
|
.id = 1,
|
|
|
|
.ep = {
|
|
|
|
.name = "ep1",
|
|
|
|
.ops = &fotg210_ep_ops,
|
|
|
|
},
|
|
|
|
.chip = &controller,
|
|
|
|
.maxpacket = CFG_EPX_MAX_PACKET_SIZE,
|
|
|
|
},
|
|
|
|
.ep[2] = {
|
|
|
|
.id = 2,
|
|
|
|
.ep = {
|
|
|
|
.name = "ep2",
|
|
|
|
.ops = &fotg210_ep_ops,
|
|
|
|
},
|
|
|
|
.chip = &controller,
|
|
|
|
.maxpacket = CFG_EPX_MAX_PACKET_SIZE,
|
|
|
|
},
|
|
|
|
.ep[3] = {
|
|
|
|
.id = 3,
|
|
|
|
.ep = {
|
|
|
|
.name = "ep3",
|
|
|
|
.ops = &fotg210_ep_ops,
|
|
|
|
},
|
|
|
|
.chip = &controller,
|
|
|
|
.maxpacket = CFG_EPX_MAX_PACKET_SIZE,
|
|
|
|
},
|
|
|
|
.ep[4] = {
|
|
|
|
.id = 4,
|
|
|
|
.ep = {
|
|
|
|
.name = "ep4",
|
|
|
|
.ops = &fotg210_ep_ops,
|
|
|
|
},
|
|
|
|
.chip = &controller,
|
|
|
|
.maxpacket = CFG_EPX_MAX_PACKET_SIZE,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2015-02-23 13:10:23 +00:00
|
|
|
int usb_gadget_handle_interrupts(int index)
|
2013-05-15 07:29:24 +00:00
|
|
|
{
|
|
|
|
struct fotg210_chip *chip = &controller;
|
|
|
|
struct fotg210_regs *regs = chip->regs;
|
|
|
|
uint32_t id, st, isr, gisr;
|
|
|
|
|
|
|
|
isr = readl(®s->isr) & (~readl(®s->imr));
|
|
|
|
gisr = readl(®s->gisr) & (~readl(®s->gimr));
|
|
|
|
if (!(isr & ISR_DEV) || !gisr)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
writel(ISR_DEV, ®s->isr);
|
|
|
|
|
|
|
|
/* CX interrupts */
|
|
|
|
if (gisr & GISR_GRP0) {
|
|
|
|
st = readl(®s->gisr0);
|
2013-12-20 04:32:59 +00:00
|
|
|
/*
|
|
|
|
* Write 1 and then 0 works for both W1C & RW.
|
|
|
|
*
|
|
|
|
* HW v1.11.0+: It's a W1C register (write 1 clear)
|
|
|
|
* HW v1.10.0-: It's a R/W register (write 0 clear)
|
|
|
|
*/
|
|
|
|
writel(st & GISR0_CXABORT, ®s->gisr0);
|
2013-05-15 07:29:24 +00:00
|
|
|
writel(0, ®s->gisr0);
|
|
|
|
|
|
|
|
if (st & GISR0_CXERR)
|
|
|
|
printf("fotg210: cmd error\n");
|
|
|
|
|
|
|
|
if (st & GISR0_CXABORT)
|
|
|
|
printf("fotg210: cmd abort\n");
|
|
|
|
|
|
|
|
if (st & GISR0_CXSETUP) /* setup */
|
|
|
|
fotg210_setup(chip);
|
|
|
|
else if (st & GISR0_CXEND) /* command finish */
|
|
|
|
setbits_le32(®s->cxfifo, CXFIFO_CXFIN);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* FIFO interrupts */
|
|
|
|
if (gisr & GISR_GRP1) {
|
|
|
|
st = readl(®s->gisr1);
|
|
|
|
for (id = 0; id < 4; ++id) {
|
|
|
|
if (st & GISR1_RX_FIFO(id))
|
|
|
|
fotg210_recv(chip, fifo_to_ep(chip, id, 0));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Device Status Interrupts */
|
|
|
|
if (gisr & GISR_GRP2) {
|
|
|
|
st = readl(®s->gisr2);
|
2013-12-20 04:32:59 +00:00
|
|
|
/*
|
|
|
|
* Write 1 and then 0 works for both W1C & RW.
|
|
|
|
*
|
|
|
|
* HW v1.11.0+: It's a W1C register (write 1 clear)
|
|
|
|
* HW v1.10.0-: It's a R/W register (write 0 clear)
|
|
|
|
*/
|
|
|
|
writel(st, ®s->gisr2);
|
2013-05-15 07:29:24 +00:00
|
|
|
writel(0, ®s->gisr2);
|
|
|
|
|
|
|
|
if (st & GISR2_RESET)
|
|
|
|
printf("fotg210: reset by host\n");
|
|
|
|
else if (st & GISR2_SUSPEND)
|
|
|
|
printf("fotg210: suspend/removed\n");
|
|
|
|
else if (st & GISR2_RESUME)
|
|
|
|
printf("fotg210: resume\n");
|
|
|
|
|
|
|
|
/* Errors */
|
|
|
|
if (st & GISR2_ISOCERR)
|
|
|
|
printf("fotg210: iso error\n");
|
|
|
|
if (st & GISR2_ISOCABT)
|
|
|
|
printf("fotg210: iso abort\n");
|
|
|
|
if (st & GISR2_DMAERR)
|
|
|
|
printf("fotg210: dma error\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int usb_gadget_register_driver(struct usb_gadget_driver *driver)
|
|
|
|
{
|
|
|
|
int i, ret = 0;
|
|
|
|
struct fotg210_chip *chip = &controller;
|
|
|
|
|
|
|
|
if (!driver || !driver->bind || !driver->setup) {
|
|
|
|
puts("fotg210: bad parameter.\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
INIT_LIST_HEAD(&chip->gadget.ep_list);
|
|
|
|
for (i = 0; i < CFG_NUM_ENDPOINTS + 1; ++i) {
|
|
|
|
struct fotg210_ep *ep = chip->ep + i;
|
|
|
|
|
|
|
|
ep->ep.maxpacket = ep->maxpacket;
|
|
|
|
INIT_LIST_HEAD(&ep->queue);
|
|
|
|
|
|
|
|
if (ep->id == 0) {
|
|
|
|
ep->stopped = 0;
|
|
|
|
} else {
|
|
|
|
ep->stopped = 1;
|
|
|
|
list_add_tail(&ep->ep.ep_list, &chip->gadget.ep_list);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (fotg210_reset(chip)) {
|
|
|
|
puts("fotg210: reset failed.\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = driver->bind(&chip->gadget);
|
|
|
|
if (ret) {
|
|
|
|
debug("fotg210: driver->bind() returned %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
chip->driver = driver;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
|
|
|
|
{
|
|
|
|
struct fotg210_chip *chip = &controller;
|
|
|
|
|
|
|
|
driver->unbind(&chip->gadget);
|
|
|
|
chip->driver = NULL;
|
|
|
|
|
|
|
|
pullup(chip, 0);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|