u-boot/arch/arm/include/asm/arch-rockchip/hardware.h

/*
 * Copyright 2015 Google, Inc
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _ASM_ARCH_HARDWARE_H
#define _ASM_ARCH_HARDWARE_H

#define RK_CLRSETBITS(clr, set)		((((clr) | (set)) << 16) | (set))
#define RK_SETBITS(set)			RK_CLRSETBITS(0, set)
#define RK_CLRBITS(clr)			RK_CLRSETBITS(clr, 0)

#define TIMER7_BASE		0xff810020

#define rk_clrsetreg(addr, clr, set)	\
				writel(((clr) | (set)) << 16 | (set), addr)
#define rk_clrreg(addr, clr)		writel((clr) << 16, addr)
#define rk_setreg(addr, set)		writel((set) << 16 | (set), addr)

#endif
rockchip: Add basic peripheral and clock definitions Add header files for the peripherals and clocks supported on Rockchip platforms. The particular implementation (and register set) for each is SoC-specific, but it seems that the naming can be generic. Signed-off-by: Simon Glass <sjg@chromium.org> 2015-08-30 22:55:28 +00:00			`/*`
			`* Copyright 2015 Google, Inc`
			`*`
			`* SPDX-License-Identifier: GPL-2.0+`
			`*/`

			`#ifndef _ASM_ARCH_HARDWARE_H`
			`#define _ASM_ARCH_HARDWARE_H`

rockchip: Tidy up the register-access macros These work reasonable well, but there are a few errors: - Brackets should be used to avoid unexpected side-effects - When setting bits, the corresponding upper 16 bits should be set also Signed-off-by: Simon Glass <sjg@chromium.org> 2016-01-22 02:45:12 +00:00			`#define RK_CLRSETBITS(clr, set) ((((clr) \| (set)) << 16) \| (set))`
rockchip: Add basic peripheral and clock definitions Add header files for the peripherals and clocks supported on Rockchip platforms. The particular implementation (and register set) for each is SoC-specific, but it seems that the naming can be generic. Signed-off-by: Simon Glass <sjg@chromium.org> 2015-08-30 22:55:28 +00:00			`#define RK_SETBITS(set) RK_CLRSETBITS(0, set)`
			`#define RK_CLRBITS(clr) RK_CLRSETBITS(clr, 0)`

			`#define TIMER7_BASE 0xff810020`

rockchip: Tidy up the register-access macros These work reasonable well, but there are a few errors: - Brackets should be used to avoid unexpected side-effects - When setting bits, the corresponding upper 16 bits should be set also Signed-off-by: Simon Glass <sjg@chromium.org> 2016-01-22 02:45:12 +00:00			`#define rk_clrsetreg(addr, clr, set) \`
			`writel(((clr) \| (set)) << 16 \| (set), addr)`
rockchip: Add basic peripheral and clock definitions Add header files for the peripherals and clocks supported on Rockchip platforms. The particular implementation (and register set) for each is SoC-specific, but it seems that the naming can be generic. Signed-off-by: Simon Glass <sjg@chromium.org> 2015-08-30 22:55:28 +00:00			`#define rk_clrreg(addr, clr) writel((clr) << 16, addr)`
rockchip: Tidy up the register-access macros These work reasonable well, but there are a few errors: - Brackets should be used to avoid unexpected side-effects - When setting bits, the corresponding upper 16 bits should be set also Signed-off-by: Simon Glass <sjg@chromium.org> 2016-01-22 02:45:12 +00:00			`#define rk_setreg(addr, set) writel((set) << 16 \| (set), addr)`
rockchip: Add basic peripheral and clock definitions Add header files for the peripherals and clocks supported on Rockchip platforms. The particular implementation (and register set) for each is SoC-specific, but it seems that the naming can be generic. Signed-off-by: Simon Glass <sjg@chromium.org> 2015-08-30 22:55:28 +00:00
			`#endif`