2014-07-30 05:08:14 +00:00
|
|
|
CONFIG_PPC=y
|
2018-02-03 17:10:38 +00:00
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|
|
CONFIG_SYS_TEXT_BASE=0xEFF40000
|
2019-11-19 01:02:10 +00:00
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|
|
CONFIG_ENV_SIZE=0x2000
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|
|
|
CONFIG_ENV_SECT_SIZE=0x20000
|
2020-07-28 12:46:52 +00:00
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|
|
CONFIG_DEFAULT_DEVICE_TREE="t4240rdb"
|
2014-07-30 05:08:14 +00:00
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|
|
CONFIG_MPC85xx=y
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|
|
|
CONFIG_TARGET_T4240RDB=y
|
2019-08-20 09:35:25 +00:00
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|
|
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
|
2016-02-23 05:55:43 +00:00
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|
|
CONFIG_FIT=y
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|
|
|
CONFIG_FIT_VERBOSE=y
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|
|
|
CONFIG_OF_BOARD_SETUP=y
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|
|
|
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
2016-06-07 06:31:14 +00:00
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|
|
CONFIG_BOOTDELAY=10
|
2018-03-28 12:38:15 +00:00
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|
|
CONFIG_BOARD_EARLY_INIT_R=y
|
2016-04-22 01:37:19 +00:00
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|
|
CONFIG_HUSH_PARSER=y
|
2017-10-08 18:48:01 +00:00
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|
|
CONFIG_CMD_IMLS=y
|
2016-04-24 21:29:26 +00:00
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|
|
CONFIG_CMD_GREPENV=y
|
2021-04-13 16:48:02 +00:00
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|
|
CONFIG_CMD_DM=y
|
2017-08-14 23:58:53 +00:00
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|
|
CONFIG_CMD_I2C=y
|
2016-04-24 21:29:26 +00:00
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|
|
CONFIG_CMD_MMC=y
|
2016-04-22 20:41:25 +00:00
|
|
|
CONFIG_CMD_USB=y
|
|
|
|
CONFIG_CMD_DHCP=y
|
2016-04-24 21:29:26 +00:00
|
|
|
CONFIG_CMD_MII=y
|
2016-04-22 20:41:25 +00:00
|
|
|
CONFIG_CMD_PING=y
|
2018-06-19 10:24:23 +00:00
|
|
|
CONFIG_MP=y
|
2016-04-24 21:29:26 +00:00
|
|
|
CONFIG_CMD_EXT2=y
|
|
|
|
CONFIG_CMD_FAT=y
|
2019-08-20 09:35:25 +00:00
|
|
|
CONFIG_OF_CONTROL=y
|
2020-07-03 11:48:56 +00:00
|
|
|
CONFIG_ENV_OVERWRITE=y
|
2017-08-28 11:16:32 +00:00
|
|
|
CONFIG_ENV_IS_IN_FLASH=y
|
2019-11-19 01:02:10 +00:00
|
|
|
CONFIG_ENV_ADDR=0xEFF20000
|
2019-09-23 15:47:37 +00:00
|
|
|
CONFIG_DM=y
|
2017-03-01 21:51:58 +00:00
|
|
|
CONFIG_FSL_CAAM=y
|
2021-08-21 17:50:17 +00:00
|
|
|
CONFIG_DDR_CLK_FREQ=133333333
|
2021-08-21 17:50:18 +00:00
|
|
|
CONFIG_DDR_ECC=y
|
|
|
|
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
|
2020-05-08 13:08:39 +00:00
|
|
|
CONFIG_DM_I2C=y
|
2021-08-19 03:12:24 +00:00
|
|
|
CONFIG_SPL_SYS_I2C_LEGACY=y
|
2021-08-19 03:12:37 +00:00
|
|
|
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
|
2021-08-19 03:12:35 +00:00
|
|
|
CONFIG_SYS_I2C_FSL=y
|
|
|
|
CONFIG_SYS_FSL_I2C_OFFSET=0x118000
|
|
|
|
CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
|
|
|
|
CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
|
2018-03-28 12:38:19 +00:00
|
|
|
CONFIG_FSL_ESDHC=y
|
2019-10-03 17:50:08 +00:00
|
|
|
CONFIG_MTD=y
|
2017-02-11 13:43:54 +00:00
|
|
|
CONFIG_MTD_NOR_FLASH=y
|
2018-10-14 20:10:50 +00:00
|
|
|
CONFIG_FLASH_CFI_DRIVER=y
|
|
|
|
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
|
|
|
CONFIG_SYS_FLASH_CFI=y
|
2020-10-05 17:11:41 +00:00
|
|
|
CONFIG_DM_SPI_FLASH=y
|
2019-02-27 14:20:36 +00:00
|
|
|
CONFIG_SF_DEFAULT_SPEED=10000000
|
2015-11-25 13:34:54 +00:00
|
|
|
CONFIG_SPI_FLASH_SST=y
|
2017-08-02 00:19:59 +00:00
|
|
|
CONFIG_PHYLIB=y
|
2020-04-24 19:35:53 +00:00
|
|
|
CONFIG_PHYLIB_10G=y
|
2019-11-26 22:32:42 +00:00
|
|
|
CONFIG_PHY_CORTINA=y
|
2021-08-10 05:50:07 +00:00
|
|
|
CONFIG_CORTINA_FW_ADDR=0xefe00000
|
2020-04-24 19:35:53 +00:00
|
|
|
CONFIG_PHY_TERANETICS=y
|
|
|
|
CONFIG_PHY_VITESSE=y
|
2021-04-13 16:48:02 +00:00
|
|
|
CONFIG_DM_ETH=y
|
|
|
|
CONFIG_DM_MDIO=y
|
2017-08-08 02:00:34 +00:00
|
|
|
CONFIG_PHY_GIGE=y
|
2015-08-19 15:33:43 +00:00
|
|
|
CONFIG_E1000=y
|
2019-09-23 15:47:37 +00:00
|
|
|
CONFIG_FMAN_ENET=y
|
|
|
|
CONFIG_MII=y
|
2019-08-27 11:03:16 +00:00
|
|
|
CONFIG_DM_PCI_COMPAT=y
|
|
|
|
CONFIG_PCIE_FSL=y
|
2019-05-12 11:59:12 +00:00
|
|
|
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
|
2015-11-19 13:48:14 +00:00
|
|
|
CONFIG_SYS_NS16550=y
|
2018-04-15 17:51:26 +00:00
|
|
|
CONFIG_SPI=y
|
2020-10-05 17:11:41 +00:00
|
|
|
CONFIG_DM_SPI=y
|
2015-11-25 13:34:53 +00:00
|
|
|
CONFIG_FSL_ESPI=y
|
2016-09-08 20:31:26 +00:00
|
|
|
CONFIG_USB=y
|
2020-10-05 17:11:41 +00:00
|
|
|
CONFIG_USB_STORAGE=y
|
2020-06-03 12:43:40 +00:00
|
|
|
CONFIG_ADDR_MAP=y
|
|
|
|
CONFIG_SYS_NUM_ADDR_MAP=64
|