2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2016-06-05 00:42:59 +00:00
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/*
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* (C) Copyright 2013-2016 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <watchdog.h>
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2020-10-31 03:38:53 +00:00
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#include <asm/global_data.h>
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2016-06-05 00:42:59 +00:00
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#include <asm/io.h>
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#include <serial.h>
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#include <linux/compiler.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/clock.h>
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#define US1_TDRE (1 << 7)
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#define US1_RDRF (1 << 5)
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#define UC2_TE (1 << 3)
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#define LINCR1_INIT (1 << 0)
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#define LINCR1_MME (1 << 4)
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#define LINCR1_BF (1 << 7)
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#define LINSR_LINS_INITMODE (0x00001000)
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#define LINSR_LINS_MASK (0x0000F000)
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#define UARTCR_UART (1 << 0)
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#define UARTCR_WL0 (1 << 1)
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#define UARTCR_PCE (1 << 2)
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#define UARTCR_PC0 (1 << 3)
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#define UARTCR_TXEN (1 << 4)
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#define UARTCR_RXEN (1 << 5)
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#define UARTCR_PC1 (1 << 6)
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#define UARTSR_DTF (1 << 1)
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#define UARTSR_DRF (1 << 2)
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#define UARTSR_RMB (1 << 9)
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DECLARE_GLOBAL_DATA_PTR;
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static void _linflex_serial_setbrg(struct linflex_fsl *base, int baudrate)
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{
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u32 clk = mxc_get_clock(MXC_UART_CLK);
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u32 ibr, fbr;
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if (!baudrate)
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baudrate = CONFIG_BAUDRATE;
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ibr = (u32) (clk / (16 * gd->baudrate));
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fbr = (u32) (clk % (16 * gd->baudrate)) * 16;
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__raw_writel(ibr, &base->linibrr);
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__raw_writel(fbr, &base->linfbrr);
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}
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static int _linflex_serial_getc(struct linflex_fsl *base)
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{
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char c;
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if (!(__raw_readb(&base->uartsr) & UARTSR_DRF))
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return -EAGAIN;
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if (!(__raw_readl(&base->uartsr) & UARTSR_RMB))
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return -EAGAIN;
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c = __raw_readl(&base->bdrm);
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__raw_writeb((__raw_readb(&base->uartsr) | (UARTSR_DRF | UARTSR_RMB)),
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&base->uartsr);
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return c;
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}
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static int _linflex_serial_putc(struct linflex_fsl *base, const char c)
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{
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__raw_writeb(c, &base->bdrl);
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if (!(__raw_readb(&base->uartsr) & UARTSR_DTF))
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return -EAGAIN;
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__raw_writeb((__raw_readb(&base->uartsr) | UARTSR_DTF), &base->uartsr);
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return 0;
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}
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/*
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* Initialise the serial port with the given baudrate. The settings
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* are always 8 data bits, no parity, 1 stop bit, no start bits.
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*/
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static int _linflex_serial_init(struct linflex_fsl *base)
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{
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volatile u32 ctrl;
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/* set the Linflex in master mode amd activate by-pass filter */
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ctrl = LINCR1_BF | LINCR1_MME;
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__raw_writel(ctrl, &base->lincr1);
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/* init mode */
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ctrl |= LINCR1_INIT;
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__raw_writel(ctrl, &base->lincr1);
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/* waiting for init mode entry - TODO: add a timeout */
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while ((__raw_readl(&base->linsr) & LINSR_LINS_MASK) !=
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LINSR_LINS_INITMODE);
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/* set UART bit to allow writing other bits */
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__raw_writel(UARTCR_UART, &base->uartcr);
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/* provide data bits, parity, stop bit, etc */
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serial_setbrg();
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/* 8 bit data, no parity, Tx and Rx enabled, UART mode */
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__raw_writel(UARTCR_PC1 | UARTCR_RXEN | UARTCR_TXEN | UARTCR_PC0
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| UARTCR_WL0 | UARTCR_UART, &base->uartcr);
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ctrl = __raw_readl(&base->lincr1);
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ctrl &= ~LINCR1_INIT;
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__raw_writel(ctrl, &base->lincr1); /* end init mode */
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return 0;
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}
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2020-12-03 23:55:23 +00:00
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struct linflex_serial_plat {
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2016-06-05 00:42:59 +00:00
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struct linflex_fsl *base_addr;
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u8 port_id; /* do we need this? */
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};
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struct linflex_serial_priv {
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struct linflex_fsl *lfuart;
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};
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int linflex_serial_setbrg(struct udevice *dev, int baudrate)
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{
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struct linflex_serial_priv *priv = dev_get_priv(dev);
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_linflex_serial_setbrg(priv->lfuart, baudrate);
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return 0;
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}
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static int linflex_serial_getc(struct udevice *dev)
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{
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struct linflex_serial_priv *priv = dev_get_priv(dev);
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return _linflex_serial_getc(priv->lfuart);
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}
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static int linflex_serial_putc(struct udevice *dev, const char ch)
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{
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struct linflex_serial_priv *priv = dev_get_priv(dev);
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return _linflex_serial_putc(priv->lfuart, ch);
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}
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static int linflex_serial_pending(struct udevice *dev, bool input)
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{
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struct linflex_serial_priv *priv = dev_get_priv(dev);
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uint32_t uartsr = __raw_readl(&priv->lfuart->uartsr);
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if (input)
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return ((uartsr & UARTSR_DRF) && (uartsr & UARTSR_RMB)) ? 1 : 0;
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else
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return uartsr & UARTSR_DTF ? 0 : 1;
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}
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static void linflex_serial_init_internal(struct linflex_fsl *lfuart)
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{
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_linflex_serial_init(lfuart);
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_linflex_serial_setbrg(lfuart, CONFIG_BAUDRATE);
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return;
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}
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static int linflex_serial_probe(struct udevice *dev)
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{
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2020-12-23 02:30:28 +00:00
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struct linflex_serial_plat *plat = dev_get_plat(dev);
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2016-06-05 00:42:59 +00:00
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struct linflex_serial_priv *priv = dev_get_priv(dev);
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priv->lfuart = (struct linflex_fsl *)plat->base_addr;
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linflex_serial_init_internal(priv->lfuart);
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return 0;
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}
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static const struct dm_serial_ops linflex_serial_ops = {
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.putc = linflex_serial_putc,
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.pending = linflex_serial_pending,
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.getc = linflex_serial_getc,
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.setbrg = linflex_serial_setbrg,
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};
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U_BOOT_DRIVER(serial_linflex) = {
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.name = "serial_linflex",
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.id = UCLASS_SERIAL,
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.probe = linflex_serial_probe,
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.ops = &linflex_serial_ops,
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.flags = DM_FLAG_PRE_RELOC,
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2020-12-03 23:55:17 +00:00
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.priv_auto = sizeof(struct linflex_serial_priv),
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2016-06-05 00:42:59 +00:00
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};
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#ifdef CONFIG_DEBUG_UART_LINFLEXUART
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#include <debug_uart.h>
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static inline void _debug_uart_init(void)
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{
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struct linflex_fsl *base = (struct linflex_fsl *)CONFIG_DEBUG_UART_BASE;
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linflex_serial_init_internal(base);
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}
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static inline void _debug_uart_putc(int ch)
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{
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struct linflex_fsl *base = (struct linflex_fsl *)CONFIG_DEBUG_UART_BASE;
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/* XXX: Is this OK? Should this use the non-DM version? */
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_linflex_serial_putc(base, ch);
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}
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DEBUG_UART_FUNCS
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#endif /* CONFIG_DEBUG_UART_LINFLEXUART */
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