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u-boot/configs/j721s2_evm_r5_defconfig

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configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig Enable R5 SPL specific configs for J721S2. Signed-off-by: David Huang <d-huang@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
2022-01-25 15:26:45 +00:00
CONFIG_ARM=y
CONFIG_ARCH_K3=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py and update scripts/pylint.base Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-08 23:50:55 +00:00
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x10000
configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig Enable R5 SPL specific configs for J721S2. Signed-off-by: David Huang <d-huang@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
2022-01-25 15:26:45 +00:00
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SOC_K3_J721S2=y
CONFIG_K3_EARLY_CONS=y
CONFIG_TARGET_J721S2_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py and update scripts/pylint.base Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-08 23:50:55 +00:00
CONFIG_DEFAULT_DEVICE_TREE="k3-j721s2-r5-common-proc-board"
configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig Enable R5 SPL specific configs for J721S2. Signed-off-by: David Huang <d-huang@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
2022-01-25 15:26:45 +00:00
CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py and update scripts/pylint.base Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-08 23:50:55 +00:00
CONFIG_SPL_SIZE_LIMIT=0x80000
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000
configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig Enable R5 SPL specific configs for J721S2. Signed-off-by: David Huang <d-huang@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
2022-01-25 15:26:45 +00:00
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py and update scripts/pylint.base Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-08 23:50:55 +00:00
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig Enable R5 SPL specific configs for J721S2. Signed-off-by: David Huang <d-huang@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
2022-01-25 15:26:45 +00:00
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_USE_BOOTCOMMAND=y
# CONFIG_DISPLAY_CPUINFO is not set
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py and update scripts/pylint.base Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-08 23:50:55 +00:00
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig Enable R5 SPL specific configs for J721S2. Signed-off-by: David Huang <d-huang@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
2022-01-25 15:26:45 +00:00
CONFIG_SPL_BOARD_INIT=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py and update scripts/pylint.base Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-08 23:50:55 +00:00
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig Enable R5 SPL specific configs for J721S2. Signed-off-by: David Huang <d-huang@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
2022-01-25 15:26:45 +00:00
CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_EARLY_BSS=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
CONFIG_SPL_DMA=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_REMOTEPROC=y
# CONFIG_SPL_SPI_FLASH_TINY is not set
CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py and update scripts/pylint.base Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-08 23:50:55 +00:00
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig Enable R5 SPL specific configs for J721S2. Signed-off-by: David Huang <d-huang@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
2022-01-25 15:26:45 +00:00
CONFIG_SPL_THERMAL=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_DFU=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_REMOTEPROC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py and update scripts/pylint.base Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-08 23:50:55 +00:00
CONFIG_SPL_CLK_CCF=y
CONFIG_SPL_CLK_K3_PLL=y
CONFIG_SPL_CLK_K3=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000
configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig Enable R5 SPL specific configs for J721S2. Signed-off-by: David Huang <d-huang@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
2022-01-25 15:26:45 +00:00
CONFIG_DMA_CHANNELS=y
CONFIG_TI_K3_NAVSS_UDMA=y
CONFIG_TI_SCI_PROTOCOL=y
CONFIG_DA8XX_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_SYS_I2C_OMAP24XX=y
CONFIG_DM_MAILBOX=y
CONFIG_K3_SEC_PROXY=y
CONFIG_FS_LOADER=y
drivers: misc: Makefile: Enable fs_loader compilation at SPL Level Enable fs_loader compilation at SPL Level. Signed-off-by: Keerthy <j-keerthy@ti.com> [Amjad: fix compilation failures for J721e platform] Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
2022-01-27 12:16:53 +00:00
CONFIG_SPL_FS_LOADER=y
configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig Enable R5 SPL specific configs for J721S2. Signed-off-by: David Huang <d-huang@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
2022-01-25 15:26:45 +00:00
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_SPL_MMC_HS400_SUPPORT=y
CONFIG_MMC_SDHCI=y
CONFIG_SPL_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_AM654=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_CFI_FLASH=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
configs: Re-run migrations As the CI test for stopping platforms from being merged that were defining symbols that had Kconfig entries, a small number of symbols needed to be migrated again. Do so, and catch two cases the README should also have been updated but was not. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-11 12:12:48 +00:00
CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig Enable R5 SPL specific configs for J721S2. Signed-off-by: David Huang <d-huang@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
2022-01-25 15:26:45 +00:00
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_SOFT_RESET=y
CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_S28HS512T=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_MT35XU=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_GENERIC is not set
CONFIG_PINCTRL_SINGLE=y
CONFIG_POWER_DOMAIN=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py and update scripts/pylint.base Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-08 23:50:55 +00:00
CONFIG_TI_POWER_DOMAIN=y
configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig Enable R5 SPL specific configs for J721S2. Signed-off-by: David Huang <d-huang@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
2022-01-25 15:26:45 +00:00
CONFIG_K3_SYSTEM_CONTROLLER=y
CONFIG_REMOTEPROC_TI_K3_ARM64=y
CONFIG_DM_RESET=y
CONFIG_RESET_TI_SCI=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
CONFIG_SOC_DEVICE_TI_K3=y
CONFIG_SOC_TI=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_CADENCE_QSPI=y
spi: cadence_qspi: Migrate CONFIG_CQSPI_REF_CLK to Kconfig This is a little tricky since SoCFPGA has code to determine this as runtime. Introduce a guard variable for platforms to select if they have a static value to use. Then for ARCH_SOCFPGA, call cm_get_qspi_controller_clk_hz() and otherwise continue the previous behavior. Cc: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-30 22:07:23 +00:00
CONFIG_HAS_CQSPI_REF_CLK=y
CONFIG_CQSPI_REF_CLK=133333333
configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig Enable R5 SPL specific configs for J721S2. Signed-off-by: David Huang <d-huang@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
2022-01-25 15:26:45 +00:00
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_TI_SCI=y
CONFIG_DM_THERMAL=y
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_SPL_DM_USB_GADGET=y
CONFIG_USB_CDNS3=y
CONFIG_USB_CDNS3_GADGET=y
CONFIG_SPL_USB_CDNS3_GADGET=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
CONFIG_USB_GADGET_VENDOR_NUM=0x0451
CONFIG_USB_GADGET_PRODUCT_NUM=0x6168
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_FS_EXT4=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py and update scripts/pylint.base Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-08 23:50:55 +00:00
CONFIG_PANIC_HANG=y
configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig Enable R5 SPL specific configs for J721S2. Signed-off-by: David Huang <d-huang@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
2022-01-25 15:26:45 +00:00
CONFIG_LIB_RATIONAL=y
CONFIG_SPL_LIB_RATIONAL=y
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