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u-boot/drivers/sysreset/Makefile

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drivers/sysreset: group sysreset drivers Create drivers/sysreset and move sysreset-uclass and all sysreset drivers there. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-08-07 05:53:00 +00:00
#
# (C) Copyright 2016 Cadence Design Systems Inc.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-$(CONFIG_SYSRESET) += sysreset-uclass.o
sysreset: psci: support system reset in a generic way with PSCI If the system is running PSCI firmware, the System Reset function (func ID: 0x80000009) is supposed to be handled by PSCI, that is, the SoC/board specific reset implementation should be moved to PSCI. U-Boot should call the PSCI service according to the arm-smccc manner. The arm-smccc is supported on ARMv7 or later. Especially, ARMv8 generation SoCs are likely to run ARM Trusted Firmware BL31. In this case, U-Boot is a non-secure world boot loader, so it should not be able to reset the system directly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-04-14 02:10:24 +00:00
obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
sysreset: add syscon-reboot driver Add a new sysreset driver based on linux/drivers/power/reset/syscon-reboot.c, which provides a generic driver for platforms that only require writing a mask to a regmap offset. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-24 22:39:14 +00:00
obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
dm: sysreset: add watchdog-reboot driver Add a new sysreset driver that uses the recently added watchdog support. It performs a full SoC reset by calling wdt_expire_now op. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-16 16:29:13 +00:00
obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
drivers/sysreset: group sysreset drivers Create drivers/sysreset and move sysreset-uclass and all sysreset drivers there. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-08-07 05:53:00 +00:00
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
endif
rockchip: rk3188: Add sysreset driver Driver for the sysreset of Rockchip rk3188 socs. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-02-18 18:46:32 +00:00
obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o
rockchip: enable rk322x sysreset driver The sysreset driver for rk322x is ready but not enabled, add it to Makefile to make sure it's enabled. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-09 11:10:13 +00:00
obj-$(CONFIG_ROCKCHIP_RK322X) += sysreset_rk322x.o
drivers/sysreset: group sysreset drivers Create drivers/sysreset and move sysreset-uclass and all sysreset drivers there. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-08-07 05:53:00 +00:00
obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
rockchip: rk3328: add sysreset driver Add rk3328 sysreset driver. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-02-23 07:37:54 +00:00
obj-$(CONFIG_ROCKCHIP_RK3328) += sysreset_rk3328.o
rockchip: rk3368: Add sysreset driver Add sysreset driver to reset rk3368 SOC. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-15 10:19:42 +00:00
obj-$(CONFIG_ROCKCHIP_RK3368) += sysreset_rk3368.o
drivers/sysreset: group sysreset drivers Create drivers/sysreset and move sysreset-uclass and all sysreset drivers there. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-08-07 05:53:00 +00:00
obj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o
rockchip: Add core Soc start-up code for rv1108 RV1108 is embedded with an ARM Cortex-A7 single core and a DSP core from Rockchip. It is designed for varies application scenario such as car DVR, sports DV, secure camera and UAV camera. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-01 10:00:55 +00:00
obj-$(CONFIG_ROCKCHIP_RV1108) += sysreset_rv1108.o
drivers/sysreset: group sysreset drivers Create drivers/sysreset and move sysreset-uclass and all sysreset drivers there. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-08-07 05:53:00 +00:00
obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
STiH410: Add STi sysreset driver Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-21 12:37:06 +00:00
obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
xtensa: add support for the 'xtfpga' evaluation board The 'xtfpga' board is actually a set of FPGA evaluation boards that can be configured to run an Xtensa processor. - Avnet Xilinx LX60 - Avnet Xilinx LX110 - Avnet Xilinx LX200 - Xilinx ML605 - Xilinx KC705 These boards share the same components (open-ethernet, ns16550 serial, lcd display, flash, etc.). Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-08-10 15:36:48 +00:00
obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
aspeed: Add drivers common to all Aspeed SoCs Add support for Watchdog Timer, which is compatible with AST2400 and AST2500 watchdogs. There is no uclass for Watchdog yet, so the driver does not follow the driver model. It also uses fixed clock, so no clock driver is needed. Add support for timer for Aspeed ast2400/ast2500 devices. The driver actually controls several devices, but because all devices share the same Control Register, it is somewhat difficult to completely decouple them. Since only one timer is needed at the moment, this should be OK. The timer uses fixed clock, so does not rely on a clock driver. Add sysreset driver, which uses watchdog timer to do resets and particular watchdog device to use is hardcoded (0) Reviewed-by: Simon Glass <sjg@chromium.org>
2017-01-18 21:44:55 +00:00
obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
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