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u-boot/arch/arm/mach-zynq/include/mach/sys_proto.h

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-06 21:58:06 +00:00
/* SPDX-License-Identifier: GPL-2.0+ */
arm: zynq: Add SLCR support with system reset The patch provides slcr base address initialization support and a support to reset the cpu through slcr driver, hence removed the reset_cpu() from board.c. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-02-04 11:38:59 +00:00
/*
* Copyright (c) 2013 Xilinx Inc.
*/
#ifndef _SYS_PROTO_H_
#define _SYS_PROTO_H_
extern void zynq_slcr_lock(void);
extern void zynq_slcr_unlock(void);
extern void zynq_slcr_cpu_reset(void);
fpga: zynq: Add support for loading bitstream Devcfg device requires to load bitstream in binary format. But u-boot also has an option for loading bitstream in bit format. Let's handle both cases by zynqpl driver. Also add suport for loading partial bitstreams. The first driver version was done by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-04-22 13:43:02 +00:00
extern void zynq_slcr_devcfg_disable(void);
extern void zynq_slcr_devcfg_enable(void);
zynq: Add support to find bootmode Added support to find the bootmodes by reading slcr bootmode register. this can be helpful to autoboot the configurations w.r.t a specified bootmode. Added this functionality on board_late_init as it's not needed for normal initializtion part. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-08 20:18:21 +00:00
extern u32 zynq_slcr_get_boot_mode(void);
fpga: zynq: Add support for loading bitstream Devcfg device requires to load bitstream in binary format. But u-boot also has an option for loading bitstream in bit format. Let's handle both cases by zynqpl driver. Also add suport for loading partial bitstreams. The first driver version was done by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-04-22 13:43:02 +00:00
extern u32 zynq_slcr_get_idcode(void);
ARM: zynq: Add MIO detection code Add run-time MIO pin detection to get actual pin configuration for specific periphery. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-04-25 10:21:04 +00:00
extern int zynq_slcr_get_mio_pin_status(const char *periph);
zynq: Add new ddrc driver for ECC support The first 1MB is not initialized by first stage bootloader. Check if memory is setup to 16bit mode and ECC is enabled. If it is, clear the first 1MB. Also u-boot should report only the half size of memory. Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-06-17 12:37:01 +00:00
extern void zynq_ddrc_init(void);
ARM: zynq: Added efuse status register base address Added efuse status register base address. This register is used for determining whether efuse was blown or not. Also, added the zynq_get_silicon_version() to get the silicon version of the zynq board. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-11-29 13:31:25 +00:00
extern unsigned int zynq_get_silicon_version(void);
arm: zynq: Add SLCR support with system reset The patch provides slcr base address initialization support and a support to reset the cpu through slcr driver, hence removed the reset_cpu() from board.c. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-02-04 11:38:59 +00:00
net: gem: Allow to set the MAC from an EEPROM Provide board specific option how to read MAC address from ROM. Do it in generic way to be reusable by differnet boards. If this is not enough board specific functions can be created. Signed-off-by: Joe Hershberger <joe.hershberger@gmail.com> # driver part Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-26 17:57:03 +00:00
int zynq_board_read_rom_ethaddr(unsigned char *ethaddr);
arm: zynq: Add SLCR support with system reset The patch provides slcr base address initialization support and a support to reset the cpu through slcr driver, hence removed the reset_cpu() from board.c. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-02-04 11:38:59 +00:00
#endif /* _SYS_PROTO_H_ */
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