2020-12-11 16:05:24 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020 Marvell International Ltd.
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*
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* Defines some GPIO information used in multiple places
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*/
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#ifndef __CVMX_HELPER_GPIO_H__
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#define __CVMX_HELPER_GPIO_H__
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#define CVMX_GPIO_NAME_LEN 32 /** Length of name */
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enum cvmx_gpio_type {
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CVMX_GPIO_PIN_OCTEON, /** GPIO pin is directly connected to OCTEON */
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CVMX_GPIO_PIN_PCA953X, /** GPIO pin is NXP PCA953X compat chip */
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CVMX_GPIO_PIN_PCA957X,
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CVMX_GPIO_PIN_PCF857X, /** GPIO pin is NXP PCF857X compat chip */
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CVMX_GPIO_PIN_PCA9698, /** GPIO pin is NXP PCA9698 compat chip */
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CVMX_GPIO_PIN_CS4343, /** Inphi/Cortina CS4343 GPIO pins */
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CVMX_GPIO_PIN_OTHER, /** GPIO pin is something else */
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};
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enum cvmx_gpio_operation {
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CVMX_GPIO_OP_CONFIG, /** Initial configuration of the GPIO pin */
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CVMX_GPIO_OP_SET, /** Set pin */
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CVMX_GPIO_OP_CLEAR, /** Clear pin */
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CVMX_GPIO_OP_READ, /** Read pin */
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CVMX_GPIO_OP_TOGGLE, /** Toggle pin */
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CVMX_GPIO_OP_BLINK_START, /** Put in blink mode (if supported) */
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CVMX_GPIO_OP_BLINK_STOP, /** Takes the pin out of blink mode */
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CVMX_GPIO_OP_SET_LINK, /** Put in link monitoring mode */
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CVMX_GPIO_OP_SET_ACT, /** Put in RX activity mode */
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};
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/**
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* Inphi CS4343 output source select values for the GPIO_GPIOX output_src_sel.
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*/
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enum cvmx_inphi_cs4343_gpio_gpio_output_src_sel {
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GPIO_SEL_DRIVE = 0, /** Value of GPIOX_DRIVE */
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GPIO_SEL_DELAY = 1, /** Drive delayed */
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GPIO_SEL_TOGGLE = 2, /** Used for blinking */
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GPIO_SEL_EXT = 3, /** External function */
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GPIO_SEL_EXT_DELAY = 4, /** External function delayed */
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};
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/** Inphi GPIO_GPIOX configuration register */
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union cvmx_inphi_cs4343_gpio_cfg_reg {
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u16 u;
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struct {
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u16: 4;
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/** Data source for the GPIO output */
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u16 output_src_sel : 3;
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/** 1 = GPIO output is inverted before being output */
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u16 invert_output : 1;
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/** 1 = GPIO input is inverted before being processed */
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u16 invert_input : 1;
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/** 0 = 2.5v/1.8v signalling, 1 = 1.2v signalling */
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u16 iovddsel_1v2 : 1;
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/**
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* 0 = output selected by outen bit
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* 1 = output controlled by selected GPIO output source
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*/
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u16 outen_ovr : 1;
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/** 0 = GPIO is input only, 1 = GPIO output driver enabled */
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u16 outen : 1;
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u16: 2;
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u16 pullup_1k; /** 1 = enable 1K pad pullup */
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u16 pullup_10k; /** 1 = enable 10K pad pullup */
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} s;
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};
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#define CVMX_INPHI_CS4343_GPIO_CFG_OFFSET 0x0
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/**
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* This selects which port the GPIO gets its signals from when configured
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* as an output.
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*/
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enum cvmx_inphi_cs4343_gpio_output_cfg_port {
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PORT_0_HOST_RX = 0, /** Port pair 0 host RX */
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PORT_0_LINE_RX = 1, /** Port pair 0 line RX */
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PORT_1_HOST_RX = 2, /** Port pair 1 host RX */
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PORT_1_LINE_RX = 3, /** Port pair 1 line RX */
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PORT_3_HOST_RX = 4, /** Port pair 3 host RX */
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PORT_3_LINE_RX = 5, /** Port pair 3 line RX */
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PORT_2_HOST_RX = 6, /** Port pair 2 host RX */
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PORT_2_LINE_RX = 7, /** Port pair 2 line RX */
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COMMON = 8, /** Common */
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};
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enum cvmx_inphi_cs4343_gpio_output_cfg_function {
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RX_LOS = 0, /** Port - 1 = Receive LOS (from DSP) */
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RX_LOL = 1, /** Port - 1 = Receive LOL (inverted from MSEQ) */
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EDC_CONVERGED = 2, /** Port - 1 = EDC converged (from DSP) */
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/** Port - 1 = PRBS checker in sync (inverted from SDS) */
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RX_PRBS_SYNC = 3,
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COMMON_LOGIC_0 = 0, /** Common - Logic 0 */
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COMMON_GPIO1_INPUT = 1, /** Common - GPIO 1 input */
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COMMON_GPIO2_INPUT = 2, /** Common - GPIO 2 input */
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COMMON_GPIO3_INPUT = 3, /** Common - GPIO 3 input */
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COMMON_GPIO4_INPUT = 4, /** Common - GPIO 4 input */
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COMMON_INTERR_INPUT = 5, /** Common - INTERR input */
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/** Common - Interrupt output from GLOBAL_INT register */
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COMMON_GLOBAL_INT = 6,
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/** Common - Interrupt output from GPIO_INT register */
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COMMON_GPIO_INT = 7,
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/** Common - Temp/voltage monitor interrupt */
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COMMON_MONITOR_INT = 8,
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/** Common - Selected clock output of global clock monitor */
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COMMON_GBL_CLKMON_CLK = 9,
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};
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union cvmx_inphi_cs4343_gpio_output_cfg {
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u16 u;
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struct {
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u16: 8;
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u16 port : 4; /** port */
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u16 function : 4; /** function */
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} s;
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};
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#define CVMX_INPHI_CS4343_GPIO_OUTPUT_CFG_OFFSET 0x1
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union cvmx_inphi_cs4343_gpio_drive {
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u16 u;
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struct {
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u16: 15;
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u16 value : 1; /** output value */
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} s;
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};
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#define CVMX_INPHI_CS4343_GPIO_DRIVE_OFFSET 0x2
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union cvmx_inphi_cs4343_gpio_value {
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u16 u;
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struct {
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u16: 15;
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u16 value : 1; /** input value (read-only) */
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} s;
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};
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#define CVMX_INPHI_CS4343_GPIO_VALUE_OFFSET 0x3
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union cvmx_inphi_cs4343_gpio_toggle {
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u16 u;
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struct {
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/** Toggle rate in ms, multiply by 2 to get period in ms */
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u16 rate : 16;
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} s;
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};
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#define CVMX_INPHI_CS4343_GPIO_TOGGLE_OFFSET 0x4
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union cvmx_inphi_cs4343_gpio_delay {
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u16 u;
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struct {
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/** On delay for GPIO output in ms when enabled */
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u16 on_delay : 16;
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} s;
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};
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#define CVMX_INPHI_CS4343_GPIO_DELAY_OFFSET 0x5
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/**
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* GPIO flags associated with a GPIO pin (can be combined)
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*/
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enum cvmx_gpio_flags {
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CVMX_GPIO_ACTIVE_HIGH = 0, /** Active high (default) */
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CVMX_GPIO_ACTIVE_LOW = 1, /** Active low (inverted) */
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CVMX_GPIO_OPEN_COLLECTOR = 2, /** Output is open-collector */
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};
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/** Default timer number to use for outputting a frequency [0..3] */
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#define CVMX_GPIO_DEFAULT_TIMER 3
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/** Configuration data for native Octeon GPIO pins */
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struct cvmx_octeon_gpio_data {
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int cpu_node; /** CPU node for GPIO pin */
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int timer; /** Timer number used when in toggle mode, 0-3 */
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};
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struct cvmx_pcf857x_gpio_data {
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unsigned int latch_out;
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};
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#define CVMX_INPHI_CS4343_EFUSE_PDF_SKU_REG 0x19f
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#define CVMX_INPHI_CS4343_SKU_CS4223 0x10
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#define CVMX_INPHI_CS4343_SKU_CS4224 0x11
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#define CVMX_INPHI_CS4343_SKU_CS4343 0x12
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#define CVMX_INPHI_CS4343_SKU_CS4221 0x13
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#define CVMX_INPHI_CS4343_SKU_CS4227 0x14
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#define CVMX_INPHI_CS4343_SKU_CS4341 0x16
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struct cvmx_cs4343_gpio_data {
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int reg_offset; /** Base register address for GPIO */
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enum cvmx_gpio_operation last_op;
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u8 link_port; /** Link port number for link status */
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u16 sku; /** Value from CS4224_EFUSE_PDF_SKU register */
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u8 out_src_sel;
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u8 field_func;
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bool out_en;
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bool is_cs4343; /** True if dual package */
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struct phy_device *phydev;
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};
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struct cvmx_fdt_gpio_info;
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/** Function called for GPIO operations */
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typedef int (*cvmx_fdt_gpio_op_func_t)(struct cvmx_fdt_gpio_info *, enum cvmx_gpio_operation);
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/**
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* GPIO descriptor
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*/
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struct cvmx_fdt_gpio_info {
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struct cvmx_fdt_gpio_info *next; /** For list of GPIOs */
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char name[CVMX_GPIO_NAME_LEN]; /** Name of GPIO */
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int pin; /** GPIO pin number */
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enum cvmx_gpio_type gpio_type; /** Type of GPIO controller */
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int of_offset; /** Offset in device tree */
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int phandle;
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struct cvmx_fdt_i2c_bus_info *i2c_bus; /** I2C bus descriptor */
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int i2c_addr; /** Address on i2c bus */
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enum cvmx_gpio_flags flags; /** Flags associated with pin */
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int num_pins; /** Total number of pins */
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unsigned int latch_out; /** Latched output for 857x */
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/** Rate in ms between toggle states */
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int toggle_rate;
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/** Pointer to user data for user-defined functions */
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void *data;
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/** Function to set, clear, toggle, etc. */
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cvmx_fdt_gpio_op_func_t op_func;
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/* Two values are used to detect the initial case where nothing has
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* been configured. Initially, all of the following will be false
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* which will force the initial state to be properly set.
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*/
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/** True if the GPIO pin is currently set, useful for toggle */
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bool is_set;
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/** Set if configured to invert */
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bool invert_set;
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/** Set if input is to be inverted */
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bool invert_input;
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/** Set if direction is configured as output */
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bool dir_out;
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/** Set if direction is configured as input */
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bool dir_in;
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/** Pin is set to toggle periodically */
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bool toggle;
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/** True if LED is used to indicate link status */
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bool link_led;
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/** True if LED is used to indicate rx activity */
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bool rx_act_led;
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/** True if LED is used to indicate tx activity */
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bool tx_act_led;
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/** True if LED is used to indicate networking errors */
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bool error_led;
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/** True if LED can automatically show link */
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bool hw_link;
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};
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/** LED datastructure */
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struct cvmx_fdt_gpio_led {
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struct cvmx_fdt_gpio_led *next, *prev; /** List of LEDs */
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char name[CVMX_GPIO_NAME_LEN]; /** Name */
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struct cvmx_fdt_gpio_info *gpio; /** GPIO for LED */
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int of_offset; /** Device tree node */
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/** True if active low, note that GPIO contains this info */
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bool active_low;
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};
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/**
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* Returns the operation function for the GPIO phandle
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*
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* @param[in] fdt_addr Pointer to FDT
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* @param phandle phandle of GPIO entry
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*
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* Return: Pointer to op function or NULL if not found.
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*/
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cvmx_fdt_gpio_op_func_t cvmx_fdt_gpio_get_op_func(const void *fdt_addr, int phandle);
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/**
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* Given a phandle to a GPIO device return the type of GPIO device it is.
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*
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* @param[in] fdt_addr Address of flat device tree
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* @param phandle phandle to GPIO
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* @param[out] size Number of pins (optional, may be NULL)
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*
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* Return: Type of GPIO device or PIN_ERROR if error
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*/
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enum cvmx_gpio_type cvmx_fdt_get_gpio_type(const void *fdt_addr, int phandle, int *size);
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/**
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* Return a GPIO handle given a GPIO phandle of the form <&gpio pin flags>
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*
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* @param[in] fdt_addr Address of flat device tree
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* @param of_offset node offset of GPIO device
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* @param prop_name name of property
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*
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* Return: pointer to GPIO handle or NULL if error
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*/
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struct cvmx_fdt_gpio_info *cvmx_fdt_gpio_get_info(const void *fdt_addr, int of_offset,
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const char *prop_name);
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/**
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* Return a GPIO handle given a GPIO phandle of the form <&gpio pin flags>
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*
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* @param[in] fdt_addr Address of flat device tree
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* @param of_offset node offset for property
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* @param prop_name name of property
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*
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* Return: pointer to GPIO handle or NULL if error
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*/
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struct cvmx_fdt_gpio_info *cvmx_fdt_gpio_get_info_phandle(const void *fdt_addr, int of_offset,
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const char *prop_name);
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/**
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* Parses a GPIO entry and fills in the gpio info data structure
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*
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* @param[in] fdt_addr Address of FDT
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* @param phandle phandle for GPIO
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* @param pin pin number
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* @param flags flags set (1 = invert)
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* @param[out] gpio GPIO info data structure
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*
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* Return: 0 for success, -1 on error
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*/
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int cvmx_fdt_parse_gpio(const void *fdt_addr, int phandle, int pin, u32 flags,
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struct cvmx_fdt_gpio_info *gpio);
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/**
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* @param gpio GPIO descriptor to assign timer to
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* @param timer Octeon hardware timer number [0..3]
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*/
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void cvmx_fdt_gpio_set_timer(struct cvmx_fdt_gpio_info *gpio, int timer);
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/**
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* Given a GPIO pin descriptor, input the value of that pin
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*
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* @param pin GPIO pin descriptor
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*
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2022-01-19 17:05:50 +00:00
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* Return: 0 if low, 1 if high, -1 on error. Note that the input will be
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2020-12-11 16:05:24 +00:00
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* inverted if the CVMX_GPIO_ACTIVE_LOW flag bit is set.
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*/
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int cvmx_fdt_gpio_get(struct cvmx_fdt_gpio_info *pin);
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/**
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* Sets a GPIO pin given the GPIO descriptor
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*
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* @param gpio GPIO pin descriptor
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* @param value value to set it to, 0 or 1
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*
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2022-01-19 17:05:50 +00:00
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* Return: 0 on success, -1 on error.
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2020-12-11 16:05:24 +00:00
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*
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* NOTE: If the CVMX_GPIO_ACTIVE_LOW flag is set then the output value will be
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* inverted.
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*/
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int cvmx_fdt_gpio_set(struct cvmx_fdt_gpio_info *gpio, int value);
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/**
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* Sets the blink frequency for a GPIO pin
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*
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* @param gpio GPIO handle
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* @param freq Frequency in hz [0..500]
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*/
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void cvmx_fdt_gpio_set_freq(struct cvmx_fdt_gpio_info *gpio, int freq);
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/**
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* Enables or disables blinking a GPIO pin
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*
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* @param gpio GPIO handle
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* @param blink True to start blinking, false to stop
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*
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2022-01-19 17:05:50 +00:00
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* Return: 0 for success, -1 on error
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2020-12-11 16:05:24 +00:00
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* NOTE: Not all GPIO types support blinking.
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*/
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int cvmx_fdt_gpio_set_blink(struct cvmx_fdt_gpio_info *gpio, bool blink);
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/**
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* Alternates between link and blink mode
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*
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* @param gpio GPIO handle
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* @param blink True to start blinking, false to use link status
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*
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2022-01-19 17:05:50 +00:00
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* Return: 0 for success, -1 on error
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2020-12-11 16:05:24 +00:00
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* NOTE: Not all GPIO types support this.
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*/
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int cvmx_fdt_gpio_set_link_blink(struct cvmx_fdt_gpio_info *gpio, bool blink);
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static inline bool cvmx_fdt_gpio_hw_link_supported(const struct cvmx_fdt_gpio_info *gpio)
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{
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return gpio->hw_link;
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}
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/**
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* Configures a GPIO pin as input or output
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*
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* @param gpio GPIO pin to configure
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* @param output Set to true to make output, false for input
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*/
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void cvmx_fdt_gpio_set_output(struct cvmx_fdt_gpio_info *gpio, bool output);
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/**
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* Allocates an LED data structure
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* @param[in] name name to assign LED
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* @param of_offset Device tree offset
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* @param gpio GPIO assigned to LED (can be NULL)
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* @param last Previous LED to build a list
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*
|
2022-01-19 17:05:50 +00:00
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* Return: pointer to LED data structure or NULL if out of memory
|
2020-12-11 16:05:24 +00:00
|
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|
*/
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struct cvmx_fdt_gpio_led *cvmx_alloc_led(const char *name, int of_offset,
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|
struct cvmx_fdt_gpio_info *gpio,
|
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|
struct cvmx_fdt_gpio_led *last);
|
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|
|
|
/**
|
|
|
|
* Parses an LED in the device tree
|
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|
|
*
|
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|
|
* @param[in] fdt_addr Pointer to flat device tree
|
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|
|
* @param led_of_offset Device tree offset of LED
|
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|
|
* @param gpio GPIO data structure to use (can be NULL)
|
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|
|
* @param last Previous LED if this is a group of LEDs
|
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|
|
*
|
2022-01-19 17:05:50 +00:00
|
|
|
* Return: Pointer to LED data structure or NULL if error
|
2020-12-11 16:05:24 +00:00
|
|
|
*/
|
|
|
|
struct cvmx_fdt_gpio_led *cvmx_fdt_parse_led(const void *fdt_addr, int led_of_offset,
|
|
|
|
struct cvmx_fdt_gpio_info *gpio,
|
|
|
|
struct cvmx_fdt_gpio_led *last);
|
|
|
|
|
|
|
|
#endif /* __CVMX_HELPER_GPIO_H__ */
|