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14 lines
190 B
Text
14 lines
190 B
Text
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/*
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* Xilinx CSE QSPI single DTS
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*
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* Copyright (C) 2015 - 2017 Xilinx, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include "zynq-cse-qspi.dtsi"
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&qspi {
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spi-rx-bus-width = <4>;
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};
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