u-boot/lib/time.c

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/*
* (C) Copyright 2000-2009
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <watchdog.h>
#include <div64.h>
#include <asm/io.h>
config: consolidate CONFIG_SYS_HZ definition According to the README, CONFIG_SYS_HZ must be 1000 and most platforms follow that. In preparation to remove CONFIG_SYS_HZ from all these platforms, provide a common definition. The platforms which use a value other than 1000 will get build warning now. These configs are: include/configs/M5271EVB.h:#define CONFIG_SYS_HZ 1000000 include/configs/balloon3.h:#define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */ include/configs/idmr.h:#define CONFIG_SYS_HZ (50000000 / 64) include/configs/mini2440.h:#define CONFIG_SYS_HZ 1562500 include/configs/mx1ads.h:#define CONFIG_SYS_HZ 3686400 include/configs/omap3_zoom2.h:#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) include/configs/omap730p2.h:#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) include/configs/palmld.h:#define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */ include/configs/palmtc.h:#define CONFIG_SYS_HZ 3686400 /* Timer @ 3686400 Hz */ include/configs/rsk7203.h:#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) include/configs/rsk7264.h:#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) include/configs/rsk7269.h:#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) include/configs/scb9328.h:#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ include/configs/versatile.h:#define CONFIG_SYS_HZ (1000000 / 256) include/configs/zipitz2.h:#define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */ Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-10-04 13:40:03 +00:00
#if CONFIG_SYS_HZ != 1000
#warning "CONFIG_SYS_HZ must be 1000 and should not be defined by platforms"
#endif
#ifndef CONFIG_WD_PERIOD
# define CONFIG_WD_PERIOD (10 * 1000 * 1000) /* 10 seconds default*/
#endif
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_SYS_TIMER_RATE
ulong notrace get_tbclk(void)
{
return CONFIG_SYS_TIMER_RATE;
}
#endif
#ifdef CONFIG_SYS_TIMER_COUNTER
unsigned long notrace timer_read_counter(void)
{
#ifdef CONFIG_SYS_TIMER_COUNTS_DOWN
return ~readl(CONFIG_SYS_TIMER_COUNTER);
#else
return readl(CONFIG_SYS_TIMER_COUNTER);
#endif
}
#else
extern unsigned long __weak timer_read_counter(void);
#endif
unsigned long long __weak notrace get_ticks(void)
{
unsigned long now = timer_read_counter();
/* increment tbu if tbl has rolled over */
if (now < gd->timebase_l)
gd->timebase_h++;
gd->timebase_l = now;
return ((unsigned long long)gd->timebase_h << 32) | gd->timebase_l;
}
static unsigned long long notrace tick_to_time(uint64_t tick)
{
unsigned int div = get_tbclk();
tick *= CONFIG_SYS_HZ;
do_div(tick, div);
return tick;
}
int __weak timer_init(void)
{
return 0;
}
ulong __weak get_timer(ulong base)
{
return tick_to_time(get_ticks()) - base;
}
unsigned long __weak notrace timer_get_us(void)
{
return tick_to_time(get_ticks() * 1000);
}
static unsigned long long usec_to_tick(unsigned long usec)
{
uint64_t tick = usec;
tick *= get_tbclk();
do_div(tick, 1000000);
return tick;
}
void __weak __udelay(unsigned long usec)
{
unsigned long long tmp;
ulong tmo;
tmo = usec_to_tick(usec);
tmp = get_ticks() + tmo; /* get current timestamp */
while (get_ticks() < tmp) /* loop till event */
/*NOP*/;
}
/* ------------------------------------------------------------------------- */
void udelay(unsigned long usec)
{
ulong kv;
do {
WATCHDOG_RESET();
kv = usec > CONFIG_WD_PERIOD ? CONFIG_WD_PERIOD : usec;
__udelay (kv);
usec -= kv;
} while(usec);
}
void mdelay(unsigned long msec)
{
while (msec--)
udelay(1000);
}