mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-05 20:54:31 +00:00
191 lines
5.6 KiB
C
191 lines
5.6 KiB
C
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/*
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* Bluewater Systems Snapper 9260 and 9G20 modules
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*
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* (C) Copyright 2011 Bluewater Systems
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* Author: Andre Renaud <andre@bluewatersys.com>
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* Author: Ryan Mallon <ryan@bluewatersys.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* SoC type is defined in boards.cfg */
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#include <asm/hardware.h>
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#include <asm/sizes.h>
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#define CONFIG_SYS_TEXT_BASE 0x20000000
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
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#define CONFIG_SYS_HZ 1000
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/* CPU */
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#define CONFIG_ARCH_CPU_INIT
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#undef CONFIG_USE_IRQ
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SKIP_RELOCATE_UBOOT
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_FIT
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/* SDRAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
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#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* 64MB */
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#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \
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GENERATED_GBL_DATA_SIZE)
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/* Mem test settings */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
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/* NAND Flash */
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
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#define CONFIG_SYS_NAND_DBW_8
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
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/* Ethernet */
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#define CONFIG_MACB
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#define CONFIG_RMII
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_RESET_PHY_R
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#define CONFIG_TFTP_PORT
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#define CONFIG_TFTP_TSIZE
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/* USB */
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#define CONFIG_USB_ATMEL
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_DOS_PARTITION
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_USB_STORAGE
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/* GPIOs and IO expander */
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#define CONFIG_AT91_LEGACY
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#define CONFIG_ATMEL_LEGACY
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#define CONFIG_AT91_GPIO
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#define CONFIG_AT91_GPIO_PULLUP 1
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#define CONFIG_PCA953X
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#define CONFIG_SYS_I2C_PCA953X_ADDR 0x28
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#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x28, 16} }
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/* UARTs/Serial console */
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#define CONFIG_ATMEL_USART
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_SYS
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
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#define CONFIG_SYS_PROMPT "Snapper> "
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/* I2C - Bit-bashed */
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#define CONFIG_SOFT_I2C
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SOFT_I2C_READ_REPEATED_START
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#define CONFIG_I2C_MULTI_BUS
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#define I2C_INIT do { \
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at91_set_gpio_output(AT91_PIN_PA23, 1); \
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at91_set_gpio_output(AT91_PIN_PA24, 1); \
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at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
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at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
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} while (0)
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#define I2C_SOFT_DECLARATIONS
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#define I2C_ACTIVE
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#define I2C_TRISTATE at91_set_gpio_input(AT91_PIN_PA23, 1);
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#define I2C_READ at91_get_gpio_value(AT91_PIN_PA23);
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#define I2C_SDA(bit) do { \
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if (bit) { \
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at91_set_gpio_input(AT91_PIN_PA23, 1); \
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} else { \
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at91_set_gpio_output(AT91_PIN_PA23, 1); \
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at91_set_gpio_value(AT91_PIN_PA23, bit); \
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} \
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} while (0)
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#define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
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#define I2C_DELAY udelay(2)
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/* Boot options */
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#define CONFIG_SYS_LOAD_ADDR 0x23000000
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_ZERO_BOOTDELAY_CHECK
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/* Environment settings */
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_OFFSET (512 << 10)
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#define CONFIG_ENV_SIZE (256 << 10)
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BOOTARGS "console=ttyS0,115200 ip=any"
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/* Console settings */
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_EXTBDINFO
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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/* U-Boot memory settings */
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#define CONFIG_SYS_MALLOC_LEN (1 << 20)
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#define CONFIG_STACKSIZE (256 << 10)
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/* Command line configuration */
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_BDI
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_IMLS
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#undef CONFIG_CMD_LOADS
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#undef CONFIG_CMD_SOURCE
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_I2C
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#undef CONFIG_CMD_GPIO
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#define CONFIG_CMD_USB
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_PCA953X
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#define CONFIG_CMD_PCA953X_INFO
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#endif /* __CONFIG_H */
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