mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-30 08:31:03 +00:00
293 lines
4.8 KiB
Text
293 lines
4.8 KiB
Text
|
// SPDX-License-Identifier: GPL-2.0
|
||
|
/*
|
||
|
* Device Tree Source for the Condor board
|
||
|
*
|
||
|
* Copyright (C) 2018 Renesas Electronics Corp.
|
||
|
* Copyright (C) 2018 Cogent Embedded, Inc.
|
||
|
*/
|
||
|
|
||
|
/dts-v1/;
|
||
|
#include "r8a77980.dtsi"
|
||
|
|
||
|
/ {
|
||
|
model = "Renesas Condor board based on r8a77980";
|
||
|
compatible = "renesas,condor", "renesas,r8a77980";
|
||
|
|
||
|
aliases {
|
||
|
serial0 = &scif0;
|
||
|
ethernet0 = &gether;
|
||
|
};
|
||
|
|
||
|
chosen {
|
||
|
stdout-path = "serial0:115200n8";
|
||
|
};
|
||
|
|
||
|
memory@48000000 {
|
||
|
device_type = "memory";
|
||
|
/* first 128MB is reserved for secure area. */
|
||
|
reg = <0 0x48000000 0 0x78000000>;
|
||
|
};
|
||
|
|
||
|
d3_3v: regulator-0 {
|
||
|
compatible = "regulator-fixed";
|
||
|
regulator-name = "D3.3V";
|
||
|
regulator-min-microvolt = <3300000>;
|
||
|
regulator-max-microvolt = <3300000>;
|
||
|
regulator-boot-on;
|
||
|
regulator-always-on;
|
||
|
};
|
||
|
|
||
|
vddq_vin01: regulator-1 {
|
||
|
compatible = "regulator-fixed";
|
||
|
regulator-name = "VDDQ_VIN01";
|
||
|
regulator-min-microvolt = <1800000>;
|
||
|
regulator-max-microvolt = <1800000>;
|
||
|
regulator-boot-on;
|
||
|
regulator-always-on;
|
||
|
};
|
||
|
|
||
|
d1_8v: regulator-2 {
|
||
|
compatible = "regulator-fixed";
|
||
|
regulator-name = "D1.8V";
|
||
|
regulator-min-microvolt = <1800000>;
|
||
|
regulator-max-microvolt = <1800000>;
|
||
|
regulator-boot-on;
|
||
|
regulator-always-on;
|
||
|
};
|
||
|
|
||
|
hdmi-out {
|
||
|
compatible = "hdmi-connector";
|
||
|
type = "a";
|
||
|
|
||
|
port {
|
||
|
hdmi_con: endpoint {
|
||
|
remote-endpoint = <&adv7511_out>;
|
||
|
};
|
||
|
};
|
||
|
};
|
||
|
|
||
|
lvds-decoder {
|
||
|
compatible = "thine,thc63lvd1024";
|
||
|
vcc-supply = <&d3_3v>;
|
||
|
|
||
|
ports {
|
||
|
#address-cells = <1>;
|
||
|
#size-cells = <0>;
|
||
|
|
||
|
port@0 {
|
||
|
reg = <0>;
|
||
|
thc63lvd1024_in: endpoint {
|
||
|
remote-endpoint = <&lvds0_out>;
|
||
|
};
|
||
|
};
|
||
|
|
||
|
port@2 {
|
||
|
reg = <2>;
|
||
|
thc63lvd1024_out: endpoint {
|
||
|
remote-endpoint = <&adv7511_in>;
|
||
|
};
|
||
|
};
|
||
|
};
|
||
|
};
|
||
|
|
||
|
x1_clk: x1-clock {
|
||
|
compatible = "fixed-clock";
|
||
|
#clock-cells = <0>;
|
||
|
clock-frequency = <148500000>;
|
||
|
};
|
||
|
};
|
||
|
|
||
|
&canfd {
|
||
|
pinctrl-0 = <&canfd0_pins>;
|
||
|
pinctrl-names = "default";
|
||
|
status = "okay";
|
||
|
|
||
|
channel0 {
|
||
|
status = "okay";
|
||
|
};
|
||
|
};
|
||
|
|
||
|
&du {
|
||
|
clocks = <&cpg CPG_MOD 724>,
|
||
|
<&x1_clk>;
|
||
|
clock-names = "du.0", "dclkin.0";
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&extal_clk {
|
||
|
clock-frequency = <16666666>;
|
||
|
};
|
||
|
|
||
|
&extalr_clk {
|
||
|
clock-frequency = <32768>;
|
||
|
};
|
||
|
|
||
|
&gether {
|
||
|
pinctrl-0 = <&gether_pins>;
|
||
|
pinctrl-names = "default";
|
||
|
|
||
|
phy-mode = "rgmii-id";
|
||
|
phy-handle = <&phy0>;
|
||
|
renesas,no-ether-link;
|
||
|
status = "okay";
|
||
|
|
||
|
phy0: ethernet-phy@0 {
|
||
|
rxc-skew-ps = <1500>;
|
||
|
reg = <0>;
|
||
|
interrupt-parent = <&gpio4>;
|
||
|
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
|
||
|
};
|
||
|
};
|
||
|
|
||
|
&i2c0 {
|
||
|
pinctrl-0 = <&i2c0_pins>;
|
||
|
pinctrl-names = "default";
|
||
|
|
||
|
status = "okay";
|
||
|
clock-frequency = <400000>;
|
||
|
|
||
|
io_expander0: gpio@20 {
|
||
|
compatible = "onnn,pca9654";
|
||
|
reg = <0x20>;
|
||
|
gpio-controller;
|
||
|
#gpio-cells = <2>;
|
||
|
};
|
||
|
|
||
|
io_expander1: gpio@21 {
|
||
|
compatible = "onnn,pca9654";
|
||
|
reg = <0x21>;
|
||
|
gpio-controller;
|
||
|
#gpio-cells = <2>;
|
||
|
};
|
||
|
|
||
|
hdmi@39 {
|
||
|
compatible = "adi,adv7511w";
|
||
|
reg = <0x39>;
|
||
|
interrupt-parent = <&gpio1>;
|
||
|
interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
|
||
|
avdd-supply = <&d1_8v>;
|
||
|
dvdd-supply = <&d1_8v>;
|
||
|
pvdd-supply = <&d1_8v>;
|
||
|
bgvdd-supply = <&d1_8v>;
|
||
|
dvdd-3v-supply = <&d3_3v>;
|
||
|
|
||
|
adi,input-depth = <8>;
|
||
|
adi,input-colorspace = "rgb";
|
||
|
adi,input-clock = "1x";
|
||
|
adi,input-style = <1>;
|
||
|
adi,input-justification = "evenly";
|
||
|
|
||
|
ports {
|
||
|
#address-cells = <1>;
|
||
|
#size-cells = <0>;
|
||
|
|
||
|
port@0 {
|
||
|
reg = <0>;
|
||
|
adv7511_in: endpoint {
|
||
|
remote-endpoint = <&thc63lvd1024_out>;
|
||
|
};
|
||
|
};
|
||
|
|
||
|
port@1 {
|
||
|
reg = <1>;
|
||
|
adv7511_out: endpoint {
|
||
|
remote-endpoint = <&hdmi_con>;
|
||
|
};
|
||
|
};
|
||
|
};
|
||
|
};
|
||
|
};
|
||
|
|
||
|
&lvds0 {
|
||
|
status = "okay";
|
||
|
|
||
|
ports {
|
||
|
port@1 {
|
||
|
lvds0_out: endpoint {
|
||
|
remote-endpoint = <&thc63lvd1024_in>;
|
||
|
};
|
||
|
};
|
||
|
};
|
||
|
};
|
||
|
|
||
|
&mmc0 {
|
||
|
pinctrl-0 = <&mmc_pins>;
|
||
|
pinctrl-1 = <&mmc_pins_uhs>;
|
||
|
pinctrl-names = "default", "state_uhs";
|
||
|
|
||
|
vmmc-supply = <&d3_3v>;
|
||
|
vqmmc-supply = <&vddq_vin01>;
|
||
|
mmc-hs200-1_8v;
|
||
|
bus-width = <8>;
|
||
|
non-removable;
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&pciec {
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&pcie_bus_clk {
|
||
|
clock-frequency = <100000000>;
|
||
|
};
|
||
|
|
||
|
&pcie_phy {
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&pfc {
|
||
|
canfd0_pins: canfd0 {
|
||
|
groups = "canfd0_data_a";
|
||
|
function = "canfd0";
|
||
|
};
|
||
|
|
||
|
gether_pins: gether {
|
||
|
groups = "gether_mdio_a", "gether_rgmii",
|
||
|
"gether_txcrefclk", "gether_txcrefclk_mega";
|
||
|
function = "gether";
|
||
|
};
|
||
|
|
||
|
i2c0_pins: i2c0 {
|
||
|
groups = "i2c0";
|
||
|
function = "i2c0";
|
||
|
};
|
||
|
|
||
|
mmc_pins: mmc {
|
||
|
groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
|
||
|
function = "mmc";
|
||
|
power-source = <3300>;
|
||
|
};
|
||
|
|
||
|
mmc_pins_uhs: mmc_uhs {
|
||
|
groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
|
||
|
function = "mmc";
|
||
|
power-source = <1800>;
|
||
|
};
|
||
|
|
||
|
scif0_pins: scif0 {
|
||
|
groups = "scif0_data";
|
||
|
function = "scif0";
|
||
|
};
|
||
|
|
||
|
scif_clk_pins: scif_clk {
|
||
|
groups = "scif_clk_b";
|
||
|
function = "scif_clk";
|
||
|
};
|
||
|
};
|
||
|
|
||
|
&rwdt {
|
||
|
timeout-sec = <60>;
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&scif0 {
|
||
|
pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
|
||
|
pinctrl-names = "default";
|
||
|
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&scif_clk {
|
||
|
clock-frequency = <14745600>;
|
||
|
};
|